[openwrt/openwrt] mvebu: LS421DE: improve pin configuration

[LEDE Commits]

hauke pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/26a5aea9bc76ff17c2dae03f01ab39e7630da3cc

commit 26a5aea9bc76ff17c2dae03f01ab39e7630da3cc
Author: Daniel González Cabanelas <dgcbueu at gmail.com>
AuthorDate: Tue Apr 27 10:58:15 2021 +0200

    mvebu: LS421DE: improve pin configuration
    
    The CLK125 output pin at the ethernet PHY is connected via capacitor to
    GND and nowhere else. Disable it. Also tune the LED masks.
    
    The MPP56 and MPP60 pins at the SoC are conected to the μPD720202 USB3.0
    chip:
      - MPP56: wired to PCIe CLKREQ# (out)
      - MPP60: wired to PCIe RESET# (in)
    Configure the pcie pinmux for these pins.
    
    Signed-off-by: Daniel González Cabanelas <dgcbueu at gmail.com>
---
 .../arch/arm/boot/dts/armada-370-buffalo-ls421de.dts      | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts b/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts
index 4e176554c6..59400839a7 100644
--- a/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts
+++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-buffalo-ls421de.dts
@@ -266,15 +266,19 @@
 
 	ethphy0: ethernet-phy at 0 { /* Marvell 88E1518 */
 		reg = <0>;
-		marvell,reg-init = <0x3 0x10 0x1 0x1991>, /* LED function */
-				   <0x3 0x11 0x1 0x4401>, /* LED polarity */
-				   <0x3 0x12 0x1 0x4905>; /* LED timer */
+		marvell,reg-init = <0x2 0x10 0xffff 0x0006>, /* disable CLK125 */
+				   <0x3 0x10 0x0000 0x1991>, /* LED function */
+				   <0x3 0x11 0x0000 0x4401>, /* LED polarity */
+				   <0x3 0x12 0x0000 0x4905>; /* LED timer */
 		#thermal-sensor-cells = <0>;
 	};
 };
 
 &pciec {
 	status = "okay";
+	pinctrl-0 = <&pmx_pcie>;
+	pinctrl-names = "default";
+
 	/* Connected to uPD720202 USB 3.0 Host */
 	pcie at 1,0 {
 		status = "okay";
@@ -436,4 +440,9 @@
 		marvell,pins = "mpp55", "mpp57", "mpp62";
 		marvell,function = "gpio";
 	};
+
+	pmx_pcie: pmx-pcie {
+		marvell,pins = "mpp56", "mpp60";
+		marvell,function = "pcie";
+	};
 };