[openwrt/openwrt] mvebu: armada 370: dts: fix the crypto engine

[LEDE Commits]

hauke pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/2e1ebe96c61424d0829bb1c8b5ec44aaa8bea8af

commit 2e1ebe96c61424d0829bb1c8b5ec44aaa8bea8af
Author: Daniel González Cabanelas <dgcbueu at gmail.com>
AuthorDate: Sun Apr 4 23:06:46 2021 +0200

    mvebu: armada 370: dts: fix the crypto engine
    
    The crypto engine in Armada 370 SoCs is currently broken. It can be
    checked installing the required packages for testing openssl with hw
    acceleration:
    
      opkg install openssl-util
      opkg install kmod-cryptodev
      opkg install libopenssl-devcrypto
    
    After configuring /etc/ssl/openssl.cnf to let openssl use the crypto
    engine for digest operations, and performing some checksums..
    
      md5sum 10M-file.bin
      openssl md5 10M-file.bin
    
    ...we can see they don't match.
    
    There might be an alignment or size constraint issue caused by the
    idle-sram area.
    
    Use the whole crypto sram and disable the idle-sram area to fix it. Also
    disable the idle support by adding the broken-idle property to prevent
    accessing the disabled idle-sram.
    
    We don't care about disabling the idle support since it is already broken
    in Armada 370 causing a huge performance loss because it disables
    permanently the L2 cache. This was reported in the Openwrt forum and
    elsewhere by Debian users with different board models.
    
    Signed-off-by: Daniel González Cabanelas <dgcbueu at gmail.com>
---
 .../317-armada-370-dts-fix-crypto-engine.patch     | 29 ++++++++++++++++++++++
 .../320-armada-370-dts-fix-crypto-engine.patch     | 29 ++++++++++++++++++++++
 2 files changed, 58 insertions(+)

diff --git a/target/linux/mvebu/patches-5.10/317-armada-370-dts-fix-crypto-engine.patch b/target/linux/mvebu/patches-5.10/317-armada-370-dts-fix-crypto-engine.patch
new file mode 100644
index 0000000000..19378870ef
--- /dev/null
+++ b/target/linux/mvebu/patches-5.10/317-armada-370-dts-fix-crypto-engine.patch
@@ -0,0 +1,29 @@
+--- a/arch/arm/boot/dts/armada-370.dtsi
++++ b/arch/arm/boot/dts/armada-370.dtsi
+@@ -234,7 +234,7 @@
+ 				clocks = <&gateclk 23>;
+ 				clock-names = "cesa0";
+ 				marvell,crypto-srams = <&crypto_sram>;
+-				marvell,crypto-sram-size = <0x7e0>;
++				marvell,crypto-sram-size = <0x800>;
+ 			};
+ 		};
+ 
+@@ -255,12 +255,17 @@
+ 			 * cpuidle workaround.
+ 			 */
+ 			idle-sram at 0 {
++				status = "disabled";
+ 				reg = <0x0 0x20>;
+ 			};
+ 		};
+ 	};
+ };
+ 
++&coherencyfab {
++	broken-idle;
++};
++
+ /*
+  * Default UART pinctrl setting without RTS/CTS, can be overwritten on
+  * board level if a different configuration is used.
diff --git a/target/linux/mvebu/patches-5.4/320-armada-370-dts-fix-crypto-engine.patch b/target/linux/mvebu/patches-5.4/320-armada-370-dts-fix-crypto-engine.patch
new file mode 100644
index 0000000000..19378870ef
--- /dev/null
+++ b/target/linux/mvebu/patches-5.4/320-armada-370-dts-fix-crypto-engine.patch
@@ -0,0 +1,29 @@
+--- a/arch/arm/boot/dts/armada-370.dtsi
++++ b/arch/arm/boot/dts/armada-370.dtsi
+@@ -234,7 +234,7 @@
+ 				clocks = <&gateclk 23>;
+ 				clock-names = "cesa0";
+ 				marvell,crypto-srams = <&crypto_sram>;
+-				marvell,crypto-sram-size = <0x7e0>;
++				marvell,crypto-sram-size = <0x800>;
+ 			};
+ 		};
+ 
+@@ -255,12 +255,17 @@
+ 			 * cpuidle workaround.
+ 			 */
+ 			idle-sram at 0 {
++				status = "disabled";
+ 				reg = <0x0 0x20>;
+ 			};
+ 		};
+ 	};
+ };
+ 
++&coherencyfab {
++	broken-idle;
++};
++
+ /*
+  * Default UART pinctrl setting without RTS/CTS, can be overwritten on
+  * board level if a different configuration is used.