[openwrt/openwrt] ath79: fix 10 Mbit PLL data for UniFi AC

LEDE Commits lede-commits at lists.infradead.org
Thu Apr 15 21:41:57 BST 2021


blocktrron pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/956407292dc5fd41f2d8c7cc7e9ec77eb6444c1e

commit 956407292dc5fd41f2d8c7cc7e9ec77eb6444c1e
Author: David Bauer <mail at david-bauer.net>
AuthorDate: Wed Apr 14 23:58:25 2021 +0200

    ath79: fix 10 Mbit PLL data for UniFi AC
    
    Fix the PLL register value for 10 Mbit/s link modes on the UniFi AC Lite
    / Mesh / LR. Otherwise, 10 Mbit/s links do not transfer data.
    
    Signed-off-by: David Bauer <mail at david-bauer.net>
---
 target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi b/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
index b9a5b55cd6..b41e90abe8 100644
--- a/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
+++ b/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
@@ -24,4 +24,6 @@
 	mtd-mac-address = <&art 0x0>;
 	phy-mode = "sgmii";
 	phy-handle = <&phy4>;
+
+	pll-data = <0x03000000 0x00000101 0x00001313>;
 };



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