[openwrt/openwrt] ramips: mt7621: pbr-m1: add pcie reset for asm1061

[LEDE Commits]

981213 pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/6f2c95f0cf0519631adb5100ab71f908a2968cca

commit 6f2c95f0cf0519631adb5100ab71f908a2968cca
Author: Chuanhong Guo <gch981213 at gmail.com>
AuthorDate: Sun Sep 13 18:49:26 2020 +0800

    ramips: mt7621: pbr-m1: add pcie reset for asm1061
    
    this board has a pcie to sata bridge connected to pcie2 with a
    separated pcie reset on gpio7.
    add reset-gpios and corresponding pinctrl nodes into dts.
    
    Signed-off-by: Chuanhong Guo <gch981213 at gmail.com>
---
 target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts b/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts
index 6b4d3b35d4..1e17eadde1 100644
--- a/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts
+++ b/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts
@@ -144,8 +144,20 @@
 	};
 };
 
+&pinctrl {
+	uart3_gpio: uart3-gpio {
+		uart3 {
+			groups = "uart3";
+			function = "gpio";
+		};
+	};
+};
+
 &pcie {
 	status = "okay";
+	pinctrl-0 = <&pcie_pins>, <&uart3_gpio>;
+	reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
+		      <&gpio 7 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {