[openwrt/openwrt] layerscape: update kernel to LSDK-20.04-V5.4-update-290520

LEDE Commits lede-commits at lists.infradead.org
Sun Oct 25 19:40:27 EDT 2020


adrian pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/3b94a39c14a254e81181c1ab2a6d7b6f9aed4ba4

commit 3b94a39c14a254e81181c1ab2a6d7b6f9aed4ba4
Author: Biwen Li <biwen.li at nxp.com>
AuthorDate: Thu Aug 6 06:49:00 2020 +0000

    layerscape: update kernel to LSDK-20.04-V5.4-update-290520
    
    Update kernel from LSDK-20.04-V5.4 to LSDK-20.04-V5.4-update-290520.
    Only two patches added for Layerscape.
    
    LSDK kernel link
    https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
    
    Signed-off-by: Biwen Li <biwen.li at nxp.com>
    Signed-off-by: Yangbo Lu <yangbo.lu at nxp.com>
---
 ...dts-lx2160a-add-more-thermal-zone-support.patch | 189 +++++++++++++++++++++
 ...ermal-qoriq-Update-the-settings-for-TMUv2.patch |  85 +++++++++
 2 files changed, 274 insertions(+)

diff --git a/target/linux/layerscape/patches-5.4/302-dts-0119-arm64-dts-lx2160a-add-more-thermal-zone-support.patch b/target/linux/layerscape/patches-5.4/302-dts-0119-arm64-dts-lx2160a-add-more-thermal-zone-support.patch
new file mode 100644
index 0000000000..7a3d8be94b
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0119-arm64-dts-lx2160a-add-more-thermal-zone-support.patch
@@ -0,0 +1,189 @@
+From eba73069e7f6ac3bcb3669d980994ec42ddd810a Mon Sep 17 00:00:00 2001
+From: Yuantian Tang <andy.tang at nxp.com>
+Date: Thu, 16 Apr 2020 17:40:06 +0800
+Subject: [PATCH] arm64: dts: lx2160a: add more thermal zone support
+
+There are 7 thermal zones in lx2160a soc. Add the
+rest thermal zone node to enable them.
+Also correct one of the values for tmu-calibration property.
+
+Signed-off-by: Yuantian Tang <andy.tang at nxp.com>
+---
+ .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 130 +++++++++++++++++-
+ 1 file changed, 125 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+index cab7468c3..fe9b8bf4d 100644
+--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+@@ -440,19 +440,19 @@
+ 	};
+ 
+ 	thermal-zones {
+-		core_thermal1: core-thermal1 {
++		cluster6-7 {
+ 			polling-delay-passive = <1000>;
+ 			polling-delay = <5000>;
+ 			thermal-sensors = <&tmu 0>;
+ 
+ 			trips {
+-				core_cluster_alert: core-cluster-alert {
++				cluster6_7_alert: cluster6-7-alert {
+ 					temperature = <85000>;
+ 					hysteresis = <2000>;
+ 					type = "passive";
+ 				};
+ 
+-				core_cluster_crit: core-cluster-crit {
++				cluster6_7_crit: cluster6-7-crit {
+ 					temperature = <95000>;
+ 					hysteresis = <2000>;
+ 					type = "critical";
+@@ -461,7 +461,7 @@
+ 
+ 			cooling-maps {
+ 				map0 {
+-					trip = <&core_cluster_alert>;
++					trip = <&cluster6_7_alert>;
+ 					cooling-device =
+ 						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ 						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+@@ -482,6 +482,126 @@
+ 				};
+ 			};
+ 		};
++
++		ddr-cluster5 {
++			polling-delay-passive = <1000>;
++			polling-delay = <5000>;
++			thermal-sensors = <&tmu 1>;
++
++			trips {
++				ddr-cluster5-alert {
++					temperature = <85000>;
++					hysteresis = <2000>;
++					type = "passive";
++				};
++
++				ddr-cluster5-crit {
++					temperature = <95000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
++		};
++
++		wriop {
++			polling-delay-passive = <1000>;
++			polling-delay = <5000>;
++			thermal-sensors = <&tmu 2>;
++
++			trips {
++				wriop-alert {
++					temperature = <85000>;
++					hysteresis = <2000>;
++					type = "passive";
++				};
++
++				wriop-crit {
++					temperature = <95000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
++		};
++
++		dce-qbman-hsio2 {
++			polling-delay-passive = <1000>;
++			polling-delay = <5000>;
++			thermal-sensors = <&tmu 3>;
++
++			trips {
++				dce-qbman-alert {
++					temperature = <85000>;
++					hysteresis = <2000>;
++					type = "passive";
++				};
++
++				dce-qbman-crit {
++					temperature = <95000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
++		};
++
++		ccn-dpaa-tbu {
++			polling-delay-passive = <1000>;
++			polling-delay = <5000>;
++			thermal-sensors = <&tmu 4>;
++
++			trips {
++				ccn-dpaa-alert {
++					temperature = <85000>;
++					hysteresis = <2000>;
++					type = "passive";
++				};
++
++				ccn-dpaa-crit {
++					temperature = <95000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
++		};
++
++		cluster4-hsio3 {
++			polling-delay-passive = <1000>;
++			polling-delay = <5000>;
++			thermal-sensors = <&tmu 5>;
++
++			trips {
++				clust4-hsio3-alert {
++					temperature = <85000>;
++					hysteresis = <2000>;
++					type = "passive";
++				};
++
++				clust4-hsio3-crit {
++					temperature = <95000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
++		};
++
++		cluster2-3 {
++			polling-delay-passive = <1000>;
++			polling-delay = <5000>;
++			thermal-sensors = <&tmu 6>;
++
++			trips {
++				cluster2-3-alert {
++					temperature = <85000>;
++					hysteresis = <2000>;
++					type = "passive";
++				};
++
++				cluster2-3-crit {
++					temperature = <95000>;
++					hysteresis = <2000>;
++					type = "critical";
++				};
++			};
++		};
+ 	};
+ 
+ 	soc {
+@@ -760,7 +880,7 @@
+ 				/* Calibration data group 1 */
+ 				<0x00000000 0x00000035
+ 				/* Calibration data group 2 */
+-				0x00010001 0x00000154>;
++				0x00000001 0x00000154>;
+ 			little-endian;
+ 			#thermal-sensor-cells = <1>;
+ 		};
+-- 
+2.17.1
+
diff --git a/target/linux/layerscape/patches-5.4/818-thermal-0004-thermal-qoriq-Update-the-settings-for-TMUv2.patch b/target/linux/layerscape/patches-5.4/818-thermal-0004-thermal-qoriq-Update-the-settings-for-TMUv2.patch
new file mode 100644
index 0000000000..9534bdc3dd
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/818-thermal-0004-thermal-qoriq-Update-the-settings-for-TMUv2.patch
@@ -0,0 +1,85 @@
+From da5a7765a20d34508036ba8ed1db87e546abcf4b Mon Sep 17 00:00:00 2001
+From: Yuantian Tang <andy.tang at nxp.com>
+Date: Mon, 25 May 2020 17:33:22 +0800
+Subject: [PATCH] thermal: qoriq: Update the settings for TMUv2
+
+For TMU v2, TMSAR registers need to be set properly to get the
+accurate temperature values.
+Also the temperature read needs to be converted to degree Celsius
+since it is in degrees Kelvin.
+
+Signed-off-by: Yuantian Tang <andy.tang at nxp.com>
+---
+ drivers/thermal/qoriq_thermal.c | 21 +++++++++++++++++++--
+ 1 file changed, 19 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
+index ba7d6105a..8b371fd3d 100644
+--- a/drivers/thermal/qoriq_thermal.c
++++ b/drivers/thermal/qoriq_thermal.c
+@@ -23,6 +23,7 @@
+ #define TMTMIR_DEFAULT	0x0000000f
+ #define TIER_DISABLE	0x0
+ #define TEUMR0_V2		0x51009c00
++#define TMSARA_V2		0xe
+ #define TMU_VER1		0x1
+ #define TMU_VER2		0x2
+ 
+@@ -35,6 +36,13 @@ struct qoriq_tmu_site_regs {
+ 	u8 res0[0x8];
+ };
+ 
++struct qoriq_tmu_tmsar {
++	u32 res0;
++	u32 tmsar;
++	u32 res1;
++	u32 res2;
++};
++
+ struct qoriq_tmu_regs_v1 {
+ 	u32 tmr;		/* Mode Register */
+ 	u32 tsr;		/* Status Register */
+@@ -95,7 +103,9 @@ struct qoriq_tmu_regs_v2 {
+ 	u32 tscfgr;	/* Sensor Configuration Register */
+ 	u8 res6[0x78];
+ 	struct qoriq_tmu_site_regs site[SITES_MAX];
+-	u8 res7[0x9f8];
++	u8 res10[0x100];
++	struct qoriq_tmu_tmsar tmsar[16];
++	u8 res7[0x7f8];
+ 	u32 ipbrr0;		/* IP Block Revision Register 0 */
+ 	u32 ipbrr1;		/* IP Block Revision Register 1 */
+ 	u8 res8[0x300];
+@@ -158,7 +168,10 @@ static int tmu_get_temp(void *p, int *temp)
+ 	u32 val;
+ 
+ 	val = tmu_read(qdata, &qdata->regs->site[qsensor->id].tritsr);
+-	*temp = (val & 0xff) * 1000;
++	if (qdata->ver == TMU_VER1)
++		*temp = (val & 0xff) * 1000;
++	else
++		*temp = (val & 0x1ff) * 1000 - 273150;
+ 
+ 	return 0;
+ }
+@@ -319,6 +332,8 @@ static int qoriq_tmu_calibration(struct platform_device *pdev)
+ 
+ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+ {
++	int i;
++
+ 	/* Disable interrupt, using polling instead */
+ 	tmu_write(data, TIER_DISABLE, &data->regs->tier);
+ 
+@@ -328,6 +343,8 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+ 	} else {
+ 		tmu_write(data, TMTMIR_DEFAULT, &data->regs_v2->tmtmir);
+ 		tmu_write(data, TEUMR0_V2, &data->regs_v2->teumr0);
++		for (i = 0; i < 7; i++)
++			tmu_write(data, TMSARA_V2, &data->regs_v2->tmsar[i].tmsar);
+ 	}
+ 
+ 	/* Disable monitoring */
+-- 
+2.17.1
+



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