[openwrt/openwrt] mediatek: mt7623: fix Ethernet setup for TRGMII mode
LEDE Commits
lede-commits at lists.infradead.org
Sun Jul 26 05:50:10 EDT 2020
981213 pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/ff8cc137fb999d2f828cfaa53584fa77138836ed
commit ff8cc137fb999d2f828cfaa53584fa77138836ed
Author: David Woodhouse <dwmw2 at infradead.org>
AuthorDate: Thu Jul 23 19:35:36 2020 +0100
mediatek: mt7623: fix Ethernet setup for TRGMII mode
This fixes the TX performance issues seen on MT7623 boards.
Signed-off-by: David Woodhouse <dwmw2 at infradead.org>
---
...t-mtk_eth_soc-Always-call-mtk_gmac0_rgmii.patch | 62 ++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/target/linux/mediatek/patches-5.4/0402-net-ethernet-mtk_eth_soc-Always-call-mtk_gmac0_rgmii.patch b/target/linux/mediatek/patches-5.4/0402-net-ethernet-mtk_eth_soc-Always-call-mtk_gmac0_rgmii.patch
new file mode 100644
index 0000000000..0dc50f28d8
--- /dev/null
+++ b/target/linux/mediatek/patches-5.4/0402-net-ethernet-mtk_eth_soc-Always-call-mtk_gmac0_rgmii.patch
@@ -0,0 +1,62 @@
+In-Reply-To: <trinity-fb0cdf15-dfcf-4d60-9144-87d8fbfad5ba-1586179542451 at 3c-app-gmx-bap62>
+References: <trinity-fb0cdf15-dfcf-4d60-9144-87d8fbfad5ba-1586179542451 at 3c-app-gmx-bap62>
+Subject: [PATCH] net: ethernet: mtk_eth_soc: Always call mtk_gmac0_rgmii_adjust() for mt7623
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: René van Dorst <opensource at vdorst.com>
+
+Modify mtk_gmac0_rgmii_adjust() so it can always be called.
+mtk_gmac0_rgmii_adjust() sets-up the TRGMII clocks.
+
+Signed-off-by: René van Dorst <opensource at vdorst.com>
+Signed-off-By: David Woodhouse <dwmw2 at infradead.org>
+---
+ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 19 ++++++++++++++-----
+ 1 file changed, 14 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+index b5408c5b954a..f89f225ab144 100644
+--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+@@ -171,11 +171,21 @@ static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth,
+ return 0;
+ }
+
+-static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth, int speed)
++static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth,
++ phy_interface_t interface, int speed)
+ {
+ u32 val;
+ int ret;
+
++ if (interface == PHY_INTERFACE_MODE_TRGMII) {
++ mtk_w32(eth, TRGMII_MODE, INTF_MODE);
++ val = 500000000;
++ ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], val);
++ if (ret)
++ dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret);
++ return;
++ }
++
+ val = (speed == SPEED_1000) ?
+ INTF_MODE_RGMII_1000 : INTF_MODE_RGMII_10_100;
+ mtk_w32(eth, val, INTF_MODE);
+@@ -262,10 +272,9 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode,
+ state->interface))
+ goto err_phy;
+ } else {
+- if (state->interface !=
+- PHY_INTERFACE_MODE_TRGMII)
+- mtk_gmac0_rgmii_adjust(mac->hw,
+- state->speed);
++ mtk_gmac0_rgmii_adjust(mac->hw,
++ state->interface,
++ state->speed);
+
+ /* mt7623_pad_clk_setup */
+ for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
+--
+2.26.2
+
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