[openwrt/openwrt] realtek: add zyxel_gs1900-10hp support

LEDE Commits lede-commits at lists.infradead.org
Wed Dec 2 02:44:47 EST 2020 

blogic pushed a commit to openwrt/openwrt.git, branch master:
https://git.openwrt.org/cfbda6627956af0cab380d03fd9275574e67921e

commit cfbda6627956af0cab380d03fd9275574e67921e
Author: John Crispin <john at phrozen.org>
AuthorDate: Tue Dec 1 17:13:39 2020 +0100

    realtek: add zyxel_gs1900-10hp support
    
    Signed-off-by: John Crispin <john at phrozen.org>
---
 target/linux/realtek/config-5.4                    |   6 +
 .../realtek/dts/rtl8380_zyxel_gs1900-10hp.dts      | 282 +++++++++++++++++++++
 target/linux/realtek/image/Makefile                |   8 +
 3 files changed, 296 insertions(+)

diff --git a/target/linux/realtek/config-5.4 b/target/linux/realtek/config-5.4
index 0d459237c7..170bcb7632 100644
--- a/target/linux/realtek/config-5.4
+++ b/target/linux/realtek/config-5.4
@@ -81,6 +81,10 @@ CONFIG_HAS_IOPORT_MAP=y
 CONFIG_HZ=250
 CONFIG_HZ_250=y
 CONFIG_HZ_PERIODIC=y
+CONFIG_I2C=y
+CONFIG_I2C_ALGOBIT=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_GPIO=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_IRQCHIP=y
 CONFIG_IRQ_DOMAIN=y
@@ -95,6 +99,7 @@ CONFIG_LIBFDT=y
 CONFIG_LOCK_DEBUGGING_SUPPORT=y
 CONFIG_MDIO_BUS=y
 CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_I2C=y
 CONFIG_MEMFD_CREATE=y
 CONFIG_MFD_SYSCON=y
 CONFIG_MIGRATION=y
@@ -156,6 +161,7 @@ CONFIG_RESET_CONTROLLER=y
 CONFIG_RTL838X=y
 CONFIG_SERIAL_MCTRL_GPIO=y
 CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SFP=y
 CONFIG_SPI=y
 CONFIG_SPI_MASTER=y
 CONFIG_SPI_MEM=y
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
new file mode 100644
index 0000000000..4458acee2e
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/dts-v1/;
+
+#include "rtl838x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	compatible = "zyxel,gs1900-10hp", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-10HP Switch";
+
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	gpio1: rtl8231-gpio {
+		status = "okay";
+
+		poe_enable {
+			gpio-hog;
+			gpios = <13 0>;
+			output-high;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: sys {
+			label = "gs1900:green:sys";
+			gpios = <&gpio0 47 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	/* i2c of the left SFP cage: port 9 */
+	i2c0: i2c-gpio-0 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp0: sfp-p9 {
+		compatible = "_sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+	};
+
+	/* i2c of the right SFP cage: port 10 */
+	i2c1: i2c-gpio-1 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp1: sfp-p10 {
+		compatible = "_sff,sfp";
+		i2c-bus = <&i2c1>;
+		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+	};
+
+};
+
+&spi0 {
+	status = "okay";
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x40000>;
+				read-only;
+			};
+			partition at 40000 {
+				label = "u-boot-env";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+			partition at 50000 {
+				label = "u-boot-env2";
+				reg = <0x50000 0x10000>;
+				read-only;
+			};
+			partition at 60000 {
+				label = "jffs";
+				reg = <0x60000 0x100000>;
+			};
+			partition at 160000 {
+				label = "jffs2";
+				reg = <0x160000 0x100000>;
+			};
+			partition at b260000 {
+				label = "firmware";
+				reg = <0x260000 0x6d0000>;
+				compatible = "denx,uimage";
+			};
+			partition at 930000 {
+				label = "runtime2";
+				reg = <0x930000 0x6d0000>;
+			};
+		};
+	};
+};
+
+&ethernet0 {
+	mdio: mdio-bus {
+		compatible = "realtek,rtl838x-mdio";
+		regmap = <&ethernet0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/* Internal phy */
+		phy8: ethernet-phy at 8 {
+			reg = <8>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy9: ethernet-phy at 9 {
+			reg = <9>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy10: ethernet-phy at 10 {
+			reg = <10>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy at 11 {
+			reg = <11>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy12: ethernet-phy at 12 {
+			reg = <12>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy at 13 {
+			reg = <13>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy14: ethernet-phy at 14 {
+			reg = <14>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy15: ethernet-phy at 15 {
+			reg = <15>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy24: ethernet-phy at 24 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <24>;
+		};
+		phy26: ethernet-phy at 26 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <26>;
+		};
+	};
+};
+
+&switch0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port at 0 {
+			reg = <8>;
+			label = "lan1";
+			phy-handle = <&phy8>;
+			phy-mode = "internal";
+		};
+		port at 1 {
+			reg = <9>;
+			label = "lan2";
+			phy-handle = <&phy9>;
+			phy-mode = "internal";
+		};
+		port at 2 {
+			reg = <10>;
+			label = "lan3";
+			phy-handle = <&phy10>;
+			phy-mode = "internal";
+		};
+		port at 3 {
+			reg = <11>;
+			label = "lan4";
+			phy-handle = <&phy11>;
+			phy-mode = "internal";
+		};
+		port at 4 {
+			reg = <12>;
+			label = "lan5";
+			phy-handle = <&phy12>;
+			phy-mode = "internal";
+		};
+		port at 5 {
+			reg = <13>;
+			label = "lan6";
+			phy-handle = <&phy13>;
+			phy-mode = "internal";
+		};
+		port at 6 {
+			reg = <14>;
+			label = "lan7";
+			phy-handle = <&phy14>;
+			phy-mode = "internal";
+		};
+		port at 7 {
+			reg = <15>;
+			label = "lan8";
+			phy-handle = <&phy15>;
+			phy-mode = "internal";
+		};
+		port at 24 {
+			reg = <24>;
+			label = "lan9";
+			phy-mode = "rgmii-id";
+			phy-handle = <&phy24>;
+			sfp = <&sfp0>;
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+				pause;
+			};
+		};
+		port at 26 {
+			reg = <26>;
+			label = "lan10";
+			phy-mode = "rgmii-id";
+			phy-handle = <&phy26>;
+			sfp = <&sfp1>;
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+				pause;
+			};
+		};
+		port at 28 {
+			ethernet = <&ethernet0>;
+			reg = <28>;
+			phy-mode = "internal";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
diff --git a/target/linux/realtek/image/Makefile b/target/linux/realtek/image/Makefile
index 51356b3518..85b30aae1e 100644
--- a/target/linux/realtek/image/Makefile
+++ b/target/linux/realtek/image/Makefile
@@ -65,4 +65,12 @@ define Device/netgear_gs110tpp-v1
 endef
 TARGET_DEVICES += netgear_gs110tpp-v1
 
+define Device/zyxel_gs1900-10hp
+  SOC := rtl8380
+  IMAGE_SIZE := 6976k
+  DEVICE_VENDOR := Zyxel
+  DEVICE_MODEL := GS1900-10HP
+endef
+TARGET_DEVICES += zyxel_gs1900-10hp
+
 $(eval $(call BuildImage))

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