[openwrt/openwrt] ipq806x: force 2nd pci slot into gen1 mode
LEDE Commits
lede-commits at lists.infradead.org
Wed Jan 17 02:05:24 PST 2018
nbd pushed a commit to openwrt/openwrt.git, branch master:
https://git.lede-project.org/83499bef73cc67b9290360cf76c345a7b3c29f08
commit 83499bef73cc67b9290360cf76c345a7b3c29f08
Author: Pavel Kubelun <be.dissent at gmail.com>
AuthorDate: Thu Jul 6 17:20:18 2017 +0300
ipq806x: force 2nd pci slot into gen1 mode
According to QSDK and OEM tarballs (checked c2600, r7500v2, r7800) 2nd pci slot (pci1, 2,4 GHz card)) on ap148 based boards should operate in gen1 mode.
EA8500 is an exception and according to GPL pcie0 should operate in gen1 mode.
In previous commit we've added the support for this option, so enable it in DT for affected devices.
QSDK ref:
https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=release/endive_preview_cc&id=f3b07fe309027c52fc163149500cedddd707c506
While at it move the phy transmit termination offset value into dtsi file as it's platform specific.
Signed-off-by: Pavel Kubelun <be.dissent at gmail.com>
---
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 3 +--
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts | 3 +--
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts | 1 +
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts | 8 +++-----
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts | 1 +
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts | 1 +
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts | 3 +--
.../linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 ++++++
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts | 1 +
.../ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts | 3 +--
10 files changed, 17 insertions(+), 13 deletions(-)
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
index fa4f05b..39a0d96 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -161,12 +161,11 @@
pcie0: pci at 1b500000 {
status = "ok";
- phy-tx0-term-offset = <7>;
};
pcie1: pci at 1b700000 {
status = "ok";
- phy-tx0-term-offset = <7>;
+ force_gen1 = <1>;
};
nand at 1ac00000 {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
index 80bc5df..a4fd134 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
@@ -346,12 +346,11 @@
pcie0: pci at 1b500000 {
status = "ok";
- phy-tx0-term-offset = <7>;
};
pcie1: pci at 1b700000 {
status = "ok";
- phy-tx0-term-offset = <7>;
+ force_gen1 = <1>;
};
mdio0: mdio {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
index c1a4c82..b7c49cc 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
@@ -193,6 +193,7 @@
reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
+ force_gen1 = <1>;
};
nand at 1ac00000 {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
index 761fa43..a8628ff 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
@@ -157,19 +157,17 @@
pcie0: pci at 1b500000 {
status = "ok";
- phy-tx0-term-offset = <7>;
+ force_gen1 = <1>;
};
pcie1: pci at 1b700000 {
status = "ok";
- phy-tx0-term-offset = <7>;
};
-
+
pcie2: pci at 1b900000 {
status = "ok";
- phy-tx0-term-offset = <7>;
};
-
+
nand at 1ac00000 {
status = "ok";
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
index 2ea856d..3445a79 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
@@ -168,6 +168,7 @@
pcie1: pci at 1b700000 {
status = "ok";
+ force_gen1 = <1>;
};
nand at 1ac00000 {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
index a21cf18..c4b0c4b 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
@@ -198,6 +198,7 @@
reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
+ force_gen1 = <1>;
};
nand at 1ac00000 {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
index b55a98d..561c49a 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
@@ -259,12 +259,11 @@
pcie0: pci at 1b500000 {
status = "ok";
- phy-tx0-term-offset = <7>;
};
pcie1: pci at 1b700000 {
status = "ok";
- phy-tx0-term-offset = <7>;
+ force_gen1 = <1>;
};
mdio0: mdio {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 9996bd7..4b93fea 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1051,6 +1051,8 @@
perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
+ phy-tx0-term-offset = <7>;
+
status = "disabled";
};
@@ -1103,6 +1105,8 @@
perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
+ phy-tx0-term-offset = <7>;
+
status = "disabled";
};
@@ -1155,6 +1159,8 @@
perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
+ phy-tx0-term-offset = <7>;
+
status = "disabled";
};
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
index 15165b9..987ee85 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
@@ -229,6 +229,7 @@
reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
+ force_gen1 = <1>;
};
mdio0: mdio {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
index 403054c..4c89dcf 100644
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
@@ -299,12 +299,11 @@
pcie0: pci at 1b500000 {
status = "ok";
- phy-tx0-term-offset = <7>;
};
pcie1: pci at 1b700000 {
status = "ok";
- phy-tx0-term-offset = <7>;
+ force_gen1 = <1>;
};
nand at 1ac00000 {
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