[openwrt/openwrt] ramips: fix spurious IRQ7 events when using perf on 4.14

[LEDE Commits]

nbd pushed a commit to openwrt/openwrt.git, branch master:
https://git.lede-project.org/d8655868ca04d12ad5ed36e26fc63d61b076e33d

commit d8655868ca04d12ad5ed36e26fc63d61b076e33d
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Tue Feb 27 15:09:43 2018 +0100

    ramips: fix spurious IRQ7 events when using perf on 4.14
    
    Upstream handling of MIPS CPU IRQs is rather hackish and the interrupts
    are being enabled unconditionally in various places because of legacy
    code.
    Performance counter events are routed both through the GIC and through
    legacy CPU IRQ7 events, causing spurious interrupts.
    
    Fix this by disabling IRQ7 when trying to access the performance counter
    IRQ.
    
    Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
 .../ramips/patches-4.14/110-mt7621-perfctr-fix.patch      | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/target/linux/ramips/patches-4.14/110-mt7621-perfctr-fix.patch b/target/linux/ramips/patches-4.14/110-mt7621-perfctr-fix.patch
new file mode 100644
index 0000000..4c40e65
--- /dev/null
+++ b/target/linux/ramips/patches-4.14/110-mt7621-perfctr-fix.patch
@@ -0,0 +1,15 @@
+--- a/arch/mips/ralink/irq-gic.c
++++ b/arch/mips/ralink/irq-gic.c
+@@ -15,6 +15,12 @@
+ 
+ int get_c0_perfcount_int(void)
+ {
++	/*
++	 * Performance counter events are routed through GIC.
++	 * Prevent them from firing on CPU IRQ7 as well
++	 */
++	clear_c0_status(IE_SW0 << 7);
++
+ 	return gic_get_c0_perfcount_int();
+ }
+ EXPORT_SYMBOL_GPL(get_c0_perfcount_int);