[openwrt/openwrt] uboot-sunxi: Add Xunlong Orange Pi Zero Plus

LEDE Commits lede-commits at lists.infradead.org
Fri Feb 16 16:30:05 PST 2018


hauke pushed a commit to openwrt/openwrt.git, branch master:
https://git.lede-project.org/718e5cd1cf08d7e31e3b93a03c92b90643ccc905

commit 718e5cd1cf08d7e31e3b93a03c92b90643ccc905
Author: Hauke Mehrtens <hauke at hauke-m.de>
AuthorDate: Sat Jan 27 23:46:32 2018 +0100

    uboot-sunxi: Add Xunlong Orange Pi Zero Plus
    
    This is based on a patch from armbian:
    https://github.com/armbian/build/blob/master/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus.patch
    
    Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
 package/boot/uboot-sunxi/Makefile                  |  11 +-
 .../patches/400-ARM-dts-orange-pi-zero-plus.patch  | 148 +++++++++++++++++++++
 2 files changed, 158 insertions(+), 1 deletion(-)

diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile
index 321e7e9..f7f96e9 100644
--- a/package/boot/uboot-sunxi/Makefile
+++ b/package/boot/uboot-sunxi/Makefile
@@ -184,6 +184,14 @@ define U-Boot/pine64_plus
   UENV:=a64
 endef
 
+define U-Boot/orangepi_zero_plus
+  BUILD_SUBTARGET:=cortexa53
+  NAME:=Xunlong Orange Pi Zero Plus
+  BUILD_DEVICES:=sun50i-h5-orangepi-zero-plus
+  DEPENDS:=+PACKAGE_u-boot-orangepi_zero_plus:arm-trusted-firmware-sunxi
+  UENV:=a64
+endef
+
 UBOOT_TARGETS := \
 	A10-OLinuXino-Lime \
 	A13-OLinuXino \
@@ -210,7 +218,8 @@ UBOOT_TARGETS := \
 	orangepi_plus \
 	orangepi_2 \
 	pangolin \
-	pine64_plus
+	pine64_plus \
+	orangepi_zero_plus
 
 UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
 
diff --git a/package/boot/uboot-sunxi/patches/400-ARM-dts-orange-pi-zero-plus.patch b/package/boot/uboot-sunxi/patches/400-ARM-dts-orange-pi-zero-plus.patch
new file mode 100644
index 0000000..ca57d58
--- /dev/null
+++ b/package/boot/uboot-sunxi/patches/400-ARM-dts-orange-pi-zero-plus.patch
@@ -0,0 +1,148 @@
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -331,6 +331,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
+ dtb-$(CONFIG_MACH_SUN50I_H5) += \
+ 	sun50i-h5-nanopi-neo2.dtb \
+ 	sun50i-h5-nanopi-neo-plus2.dtb \
++	sun50i-h5-orangepi-zero-plus.dtb \
+ 	sun50i-h5-orangepi-pc2.dtb \
+ 	sun50i-h5-orangepi-prime.dtb \
+ 	sun50i-h5-orangepi-zero-plus2.dtb
+--- /dev/null
++++ b/configs/orangepi_zero_plus_defconfig
+@@ -0,0 +1,19 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_MACH_SUN50I_H5=y
++CONFIG_DRAM_CLK=624
++CONFIG_DRAM_ZQ=3881977
++CONFIG_MACPWR="PD6"
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_SPL=y
++# CONFIG_CMD_IMLS is not set
++# CONFIG_CMD_FLASH is not set
++# CONFIG_CMD_FPGA is not set
++# CONFIG_SPL_DOS_PARTITION is not set
++# CONFIG_SPL_ISO_PARTITION is not set
++# CONFIG_SPL_EFI_PARTITION is not set
++CONFIG_SPL_SPI_SUNXI=y
++CONFIG_SUN8I_EMAC=y
++CONFIG_USB_EHCI_HCD=y
+--- /dev/null
++++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
+@@ -0,0 +1,113 @@
++/*
++ * Copyright (C) 2017 Antony Antony <antony at phenome.org>
++ * Copyright (c) 2016 ARM Ltd.
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This library is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This library is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "sun50i-h5.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++	model = "Xunlong Orange Pi Zero Plus";
++	compatible = "xunlong,orangepizero-zero-plus", "allwinner,sun50i-h5";
++
++	aliases {
++		serial0 = &uart0;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	memory {
++		reg = <0x40000000 0x40000000>;
++	};
++
++	reg_vcc3v3: vcc3v3 {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc3v3";
++		regulator-min-microvolt = <3300000>;
++		regulator-max-microvolt = <3300000>;
++	};
++};
++
++&ehci1 {
++	status = "okay";
++};
++
++&mmc0 {
++	compatible = "allwinner,sun50i-h5-mmc",
++		     "allwinner,sun50i-a64-mmc",
++		     "allwinner,sun5i-a13-mmc";
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
++	vmmc-supply = <&reg_vcc3v3>;
++	bus-width = <4>;
++	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
++	cd-inverted;
++	status = "okay";
++};
++
++&mmc2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc2_8bit_pins>;
++	vmmc-supply = <&reg_vcc3v3>;
++	bus-width = <8>;
++	non-removable;
++	cap-mmc-hw-reset;
++	status = "okay";
++};
++
++&ohci1 {
++	status = "okay";
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_pins_a>;
++	status = "okay";
++};
++
++&usbphy {
++	status = "okay";
++};



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