[source] uboot-mvebu: reset the 88E1512 PHY to make the wan port work

[LEDE Commits]

jogo pushed a commit to source.git, branch master:
https://git.lede-project.org/c4823622d8499c860cd9a38e858e0c44f2851c14

commit c4823622d8499c860cd9a38e858e0c44f2851c14
Author: Jonas Gorski <jonas.gorski at gmail.com>
AuthorDate: Fri Sep 23 14:03:11 2016 +0200

    uboot-mvebu: reset the 88E1512 PHY to make the wan port work
    
    Signed-off-by: Jonas Gorski <jonas.gorski at gmail.com>
    Acked-by: Felix Fietkau <nbd at nbd.name>
---
 .../200-clearfog-reset-usom-onboard-1512-phy.patch | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/package/boot/uboot-mvebu/patches/200-clearfog-reset-usom-onboard-1512-phy.patch b/package/boot/uboot-mvebu/patches/200-clearfog-reset-usom-onboard-1512-phy.patch
new file mode 100644
index 0000000..3c47040
--- /dev/null
+++ b/package/boot/uboot-mvebu/patches/200-clearfog-reset-usom-onboard-1512-phy.patch
@@ -0,0 +1,32 @@
+From 15d52c4067b8d8a1d7a002aec41c5e6c0a8678cd Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski at gmail.com>
+Date: Fri, 23 Sep 2016 13:58:14 +0200
+Subject: [PATCH] clearfog: reset usom onboard 1512 phy
+
+Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
+the uSOM's 88E81512 gigabit Ethernet phy.
+
+This GPIO is valid on ClearFog rev 2.1 and newer.
+
+Signed-off-by: Rabeeh Khoury <rabeeh at solid-run.com>
+[jonas.gorski: adapted to upstream u-boot code]
+Signed-off-by: Jonas Gorski <jonas.gorski at gmail.com>
+---
+ board/solidrun/clearfog/clearfog.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/board/solidrun/clearfog/clearfog.c
++++ b/board/solidrun/clearfog/clearfog.c
+@@ -131,8 +131,12 @@ int board_init(void)
+ 	/* Toggle GPIO41 to reset onboard switch and phy */
+ 	clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
+ 	clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9));
++	/* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */
++	clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
++	clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19));
+ 	mdelay(1);
+ 	setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
++	setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
+ 	mdelay(10);
+ 
+ 	/* Init I2C IO expanders */