[source] ar71xx: remove obsolete flash chip locking code
LEDE Commits
lede-commits at lists.infradead.org
Mon Dec 12 01:23:52 PST 2016
nbd pushed a commit to source.git, branch master:
https://git.lede-project.org/8f23ec609c671d3012e38151f4646b5f6ed578ce
commit 8f23ec609c671d3012e38151f4646b5f6ed578ce
Author: Felix Fietkau <nbd at nbd.name>
AuthorDate: Fri Dec 9 21:07:33 2016 +0100
ar71xx: remove obsolete flash chip locking code
Signed-off-by: Felix Fietkau <nbd at nbd.name>
---
.../503-MIPS-ath79-add-flash-acquire-release.patch | 37 ----------------------
...504-MIPS-ath79-add-ath79_device_reset_get.patch | 14 +++-----
...20-MIPS-ath79-add-support-for-QCA953x-SoC.patch | 4 +--
...21-MIPS-ath79-add-support-for-QCA956x-SoC.patch | 6 ++--
.../640-MIPS-ath79-add-QCA955x-wmac-reset.patch | 2 +-
5 files changed, 11 insertions(+), 52 deletions(-)
diff --git a/target/linux/ar71xx/patches-4.4/503-MIPS-ath79-add-flash-acquire-release.patch b/target/linux/ar71xx/patches-4.4/503-MIPS-ath79-add-flash-acquire-release.patch
deleted file mode 100644
index 82235ce..0000000
--- a/target/linux/ar71xx/patches-4.4/503-MIPS-ath79-add-flash-acquire-release.patch
+++ /dev/null
@@ -1,37 +0,0 @@
---- a/arch/mips/ath79/common.c
-+++ b/arch/mips/ath79/common.c
-@@ -22,6 +22,7 @@
- #include "common.h"
-
- static DEFINE_SPINLOCK(ath79_device_reset_lock);
-+static DEFINE_MUTEX(ath79_flash_mutex);
-
- u32 ath79_cpu_freq;
- EXPORT_SYMBOL_GPL(ath79_cpu_freq);
-@@ -142,3 +143,16 @@ void ath79_device_reset_clear(u32 mask)
- spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
- }
- EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
-+
-+void ath79_flash_acquire(void)
-+{
-+ mutex_lock(&ath79_flash_mutex);
-+}
-+EXPORT_SYMBOL_GPL(ath79_flash_acquire);
-+
-+void ath79_flash_release(void)
-+{
-+ mutex_unlock(&ath79_flash_mutex);
-+}
-+EXPORT_SYMBOL_GPL(ath79_flash_release);
-+
---- a/arch/mips/include/asm/mach-ath79/ath79.h
-+++ b/arch/mips/include/asm/mach-ath79/ath79.h
-@@ -145,4 +145,7 @@ static inline u32 ath79_reset_rr(unsigne
- void ath79_device_reset_set(u32 mask);
- void ath79_device_reset_clear(u32 mask);
-
-+void ath79_flash_acquire(void);
-+void ath79_flash_release(void);
-+
- #endif /* __ASM_MACH_ATH79_H */
diff --git a/target/linux/ar71xx/patches-4.4/504-MIPS-ath79-add-ath79_device_reset_get.patch b/target/linux/ar71xx/patches-4.4/504-MIPS-ath79-add-ath79_device_reset_get.patch
index 38d426e..4f79136 100644
--- a/target/linux/ar71xx/patches-4.4/504-MIPS-ath79-add-ath79_device_reset_get.patch
+++ b/target/linux/ar71xx/patches-4.4/504-MIPS-ath79-add-ath79_device_reset_get.patch
@@ -1,19 +1,19 @@
--- a/arch/mips/include/asm/mach-ath79/ath79.h
+++ b/arch/mips/include/asm/mach-ath79/ath79.h
-@@ -144,6 +144,7 @@ static inline u32 ath79_reset_rr(unsigne
+@@ -144,5 +144,6 @@ static inline u32 ath79_reset_rr(unsigne
void ath79_device_reset_set(u32 mask);
void ath79_device_reset_clear(u32 mask);
+u32 ath79_device_reset_get(u32 mask);
- void ath79_flash_acquire(void);
- void ath79_flash_release(void);
+ #endif /* __ASM_MACH_ATH79_H */
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
-@@ -144,6 +144,32 @@ void ath79_device_reset_clear(u32 mask)
+@@ -142,3 +142,29 @@ void ath79_device_reset_clear(u32 mask)
+ spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
}
EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
-
++
+u32 ath79_device_reset_get(u32 mask)
+{
+ unsigned long flags;
@@ -39,7 +39,3 @@
+ return ret;
+}
+EXPORT_SYMBOL_GPL(ath79_device_reset_get);
-+
- void ath79_flash_acquire(void)
- {
- mutex_lock(&ath79_flash_mutex);
diff --git a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
index 27d47dc..777f7b2 100644
--- a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
+++ b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
@@ -147,7 +147,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
else
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
-@@ -104,6 +104,8 @@ void ath79_device_reset_set(u32 mask)
+@@ -103,6 +103,8 @@ void ath79_device_reset_set(u32 mask)
reg = AR933X_RESET_REG_RESET_MODULE;
else if (soc_is_ar934x())
reg = AR934X_RESET_REG_RESET_MODULE;
@@ -156,7 +156,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
else if (soc_is_qca955x())
reg = QCA955X_RESET_REG_RESET_MODULE;
else
-@@ -132,6 +134,8 @@ void ath79_device_reset_clear(u32 mask)
+@@ -131,6 +133,8 @@ void ath79_device_reset_clear(u32 mask)
reg = AR933X_RESET_REG_RESET_MODULE;
else if (soc_is_ar934x())
reg = AR934X_RESET_REG_RESET_MODULE;
diff --git a/target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch
index 83ca49e..ed90c40 100644
--- a/target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch
+++ b/target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch
@@ -136,7 +136,7 @@
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
-@@ -108,6 +108,8 @@ void ath79_device_reset_set(u32 mask)
+@@ -107,6 +107,8 @@ void ath79_device_reset_set(u32 mask)
reg = QCA953X_RESET_REG_RESET_MODULE;
else if (soc_is_qca955x())
reg = QCA955X_RESET_REG_RESET_MODULE;
@@ -145,7 +145,7 @@
else
panic("Reset register not defined for this SOC");
-@@ -138,6 +140,8 @@ void ath79_device_reset_clear(u32 mask)
+@@ -137,6 +139,8 @@ void ath79_device_reset_clear(u32 mask)
reg = QCA953X_RESET_REG_RESET_MODULE;
else if (soc_is_qca955x())
reg = QCA955X_RESET_REG_RESET_MODULE;
@@ -154,7 +154,7 @@
else
panic("Reset register not defined for this SOC");
-@@ -164,6 +168,8 @@ u32 ath79_device_reset_get(u32 mask)
+@@ -163,6 +167,8 @@ u32 ath79_device_reset_get(u32 mask)
reg = AR933X_RESET_REG_RESET_MODULE;
else if (soc_is_ar934x())
reg = AR934X_RESET_REG_RESET_MODULE;
diff --git a/target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch b/target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch
index 8c2e605..add2992 100644
--- a/target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch
+++ b/target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch
@@ -1,6 +1,6 @@
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
-@@ -39,7 +39,7 @@ unsigned int ath79_soc_rev;
+@@ -38,7 +38,7 @@ unsigned int ath79_soc_rev;
void __iomem *ath79_pll_base;
void __iomem *ath79_reset_base;
EXPORT_SYMBOL_GPL(ath79_reset_base);
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