[FS#992] bad system clock on MT7620A

[LEDE Bugs]

The following task has a new comment added:

FS#992 - bad system clock on MT7620A
User who did this - Alex Maclean (eamaclean)

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The system clock is generated from the CPU clock with a divisor of 3. This is done in hardware - the only way to change it is to use non-DDR RAM and get a divisor of 5.

There is nothing wrong with your clocks.
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More information can be found at the following URL:
https://bugs.lede-project.org/index.php?do=details&task_id=992#comment3367