[FS#976] bad DRAM clock on MT7620A

[LEDE Bugs]

The following task has a new comment added:

FS#976 - bad DRAM clock on MT7620A
User who did this - Alex Maclean (eamaclean)

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It doesn't matter what incorrect information they display on their web interface - no part of any standard DDR2 system operates at 800MHz. The DRAM clock for DDR2-800 is 200MHz, with the bus clock double that at 400MHz - transfers are on rising and falling edge of the bus clock, giving a transfer rate of 800MT/s. 

200MHz should be the correct figure to see - can't say I have the tools to verify that results in a 400MHz bus clock, but it should.
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More information can be found at the following URL:
https://bugs.lede-project.org/index.php?do=details&task_id=976#comment3364