[kvm-unit-tests PATCH 0/7] riscv: ACPI boot and BRS-I SBI tests

[Andrew Jones]

Thanks for this series, Xiang. I'm glad to see kvm-unit-tests getting
used. But please make sure you work with the RVI BRS community to ensure
your work is aligned with their plans.

Thanks,
drew

On Thu, Sep 24, 2026 at 11:39:38AM +0800, Xiang W wrote:
> Hi,
> 
> This series lets RISC-V kvm-unit-tests boot on BRS-I platforms that
> describe the system with UEFI + ACPI instead of a device tree, and adds
> a first unit test for the SBI rules in the RISC-V Boot and Runtime
> Services specification [1].
> 
> The RISC-V port currently assumes a DT for CPU bring-up, timer
> frequency, ISA-string parsing and console setup. BRS-I firmware
> typically does not provide a usable DT, and often has no MMIO UART
> either. Without these changes the existing tests abort in setup before
> they can exercise SBI.
> 
> Patches 1-4 teach the RISC-V library to initialize from ACPI when a DT
> is absent:
> 
>   - locate the ACPI 2.0 RSDP via the EFI configuration table
>   - parse MADT RINTC entries for hart / CPU bring-up
>   - read the timebase frequency from RHCT
>   - parse the ISA string from RHCT Hart Info nodes (match by ACPI UID)
> 
> The RSDP is left in EFI_ACPI_RECLAIM_MEMORY; the RISC-V allocator does
> not reuse that region, so the table is not copied aside.
> 
> Patch 5 splits CONFIG_SBI_CONSOLE out of the UART driver. io_init()
> becomes a no-op and puts() issues SBI DBCN CONSOLE_WRITE directly, so
> EFI/ACPI guests no longer depend on a described MMIO UART to print.
> 
> Patch 6 drops the EFI runner's EFI_USE_ACPI=y early exit. The runner
> already omits -machine acpi=off in that case; QEMU virt defaults to
> ACPI enabled.
> 
> Patch 7 adds riscv/riscv-brs.c for:
> 
>   SBI_010  spec version >= 2.0
>   SBI_020  HSM required
>   SBI_030  TIME required unless Sstc
>   SBI_040  IPI required unless Ssaia
>   SBI_050  RFENCE required unless Ssaia
>   SBI_060  PMU required unless Smcsrind + Sscsrind + Smcdeleg + Ssccfg
>   SBI_070  DBCN required when ACPI SPCR Interface Type is 0x15
> 
> The new test is in group "riscv-brs nodefault", so it is not part of
> the default run_tests.sh pass. DT-only QEMU virt is unchanged.
> 
> Based on kvm-unit-tests master (5a221342).
> 
> [1] https://github.com/riscv-non-isa/riscv-brs
> 
> Testing
> =======
> Build:
> 
>   ./configure --arch=riscv64 \
>               --cross-prefix=riscv64-linux-gnu- \
>               --console=sbi --enable-efi && make
> 
> EFI + ACPI (BRS-I style):
> 
>   EFI_USE_ACPI=y EFI_UEFI=/path/to/RISCV_VIRT_CODE.fd \
>     ./riscv/efi/run riscv/riscv-brs.efi
> 
> Please review.
> 
> Xiang W (7):
>   riscv: Initialize the ACPI RSDP from the EFI system table
>   riscv: Add ACPI support for CPU initialization
>   riscv: Add ACPI support for timer frequency discovery
>   riscv: Add ACPI support for ISA string discovery
>   riscv: Decouple SBI console from UART init
>   riscv: efi: Allow ACPI boots
>   riscv: Add BRS SBI requirement tests
> 
>  lib/acpi.h                |  67 ++++++++++++++-
>  lib/riscv/asm/isa.h       |   5 ++
>  lib/riscv/asm/processor.h |   1 +
>  lib/riscv/asm/sbi.h       |   2 +
>  lib/riscv/io.c            |  50 +++++------
>  lib/riscv/isa.c           |  82 ++++++++++++++++--
>  lib/riscv/setup.c         |  55 ++++++++++++
>  lib/riscv/timer.c         |  37 ++++++---
>  riscv/Makefile            |   1 +
>  riscv/efi/run             |   5 --
>  riscv/riscv-brs.c         | 171 ++++++++++++++++++++++++++++++++++++++
>  riscv/unittests.cfg       |   4 +
>  12 files changed, 424 insertions(+), 56 deletions(-)
>  create mode 100644 riscv/riscv-brs.c
> 
> -- 
> 2.47.3
>