[kvm-unit-tests PATCH 2/7] riscv: Add ACPI support for CPU initialization
Andrew Jones
andrew.jones at linux.dev
Wed Sep 30 02:39:19 PDT 2026
On Thu, Sep 24, 2026 at 11:39:40AM +0800, Xiang W wrote:
> When a DT is not provided, discover harts from the MADT RINTC
> subtables (ACPI 6.6 type 24) instead of aborting in cpu_init_acpi().
>
> Parse each RINTC entry for hart_id and ACPI UID, record them in
> thread_info, and mark the CPU present only if it is Enabled in
> the RINTC flags and SBI reports the hart as available.
>
> Also add the RINTC MADT structure and the MADT types introduced
> after GENERIC_TRANSLATOR so the RISC-V interrupt controller
> entries can be identified.
>
> Signed-off-by: Xiang W <wangxiang at iscas.ac.cn>
> ---
> lib/acpi.h | 30 +++++++++++++++++++++++++++++-
> lib/riscv/asm/processor.h | 1 +
> lib/riscv/setup.c | 28 +++++++++++++++++++++++++++-
> 3 files changed, 57 insertions(+), 2 deletions(-)
>
> diff --git a/lib/acpi.h b/lib/acpi.h
> index a62cd3a9..a905807d 100644
> --- a/lib/acpi.h
> +++ b/lib/acpi.h
> @@ -226,6 +226,22 @@ struct acpi_madt_generic_translator {
> u32 reserved2;
> };
>
> +/* 24: RISC-V Interrupt Controller (RINTC) Structure (ACPI 6.6) */
> +struct acpi_madt_rintc {
> + u8 type;
> + u8 length;
> + u8 version;
> + u8 reserved; /* reserved - must be zero */
> + u32 flags;
> + u64 hart_id;
> + u32 uid;
> + u32 ext_intc_id;
> + u64 imsic_addr;
> + u32 imsic_size;
> +};
> +
> +#define ACPI_RINTC_FLAGS_ENABLED 1
> +
> /* Values for MADT subtable type in struct acpi_subtable_header */
>
> enum acpi_madt_type {
> @@ -245,7 +261,19 @@ enum acpi_madt_type {
> ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
> ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
> ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
> - ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
> + ACPI_MADT_TYPE_MULTIPROCESSOR_WAKEUP = 16,
Linux calls this ACPI_MADT_TYPE_MULTIPROC_WAKEUP
Thanks,
drew
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