[PATCH] RISC-V: KVM: Preserve LCOFIP when checking pending interrupts

Yicong Yang yang.yicong at picoheart.com
Wed Sep 2 21:04:38 PDT 2026


Hi,

On 9/1/26 4:06 PM, Pengpeng Hou wrote:
> KVM injects the guest counter-overflow interrupt into HVIP bit 13 and
> records the same bit in irqs_pending. The guest enables it through VSIE
> LCOFIE, also at bit 13.
> 
> kvm_riscv_vcpu_has_interrupts() shifts the complete VSIP valid mask by
> VSIP_TO_HVIP_SHIFT before matching it against irqs_pending. That maps
> SSIP, STIP, and SEIP to VSSIP, VSTIP, and VSEIP, but incorrectly moves
> LCOFIP from bit 13 to bit 14. The following high-interrupt term excludes
> all local interrupt bits, so it cannot recover LCOFIP.
> 
> As a result, kvm_arch_vcpu_runnable() can report false for a vCPU waiting
> in WFI even though an enabled PMU overflow interrupt is pending.
> 
> Keep LCOFIP in place while shifting the three interrupt classes that have
> distinct VS-level bit positions. This makes a vCPU halted in WFI runnable
> when its PMU overflow interrupt is pending.
> 
> Fixes: 16b0bde9a37c ("RISC-V: KVM: Add perf sampling support for guests")
> Signed-off-by: Pengpeng Hou <pengpeng at iscas.ac.cn>

i suppose it's a vsip/hvip conversion bug but currently only lcofi will
trigger this. a fix for the conversion:

https://lore.kernel.org/linux-riscv/20260804134018.85497-1-yang.yicong@picoheart.com/

> ---
>  arch/riscv/kvm/vcpu.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index e062ca1..c6eb3bd 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -487,12 +487,14 @@ int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq)
>  bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, u64 mask)
>  {
>  	unsigned long flags;
> -	unsigned long ie;
> +	unsigned long ie, vsie;
>  	bool ret;
>  
>  	raw_spin_lock_irqsave(&vcpu->arch.irqs_pending_lock, flags);
> -	ie = ((vcpu->arch.guest_csr.vsie & VSIP_VALID_MASK)
> -		<< VSIP_TO_HVIP_SHIFT) & (unsigned long)mask;
> +	vsie = vcpu->arch.guest_csr.vsie & VSIP_VALID_MASK;
> +	ie = ((vsie & ~SIP_LCOFIP) << VSIP_TO_HVIP_SHIFT) |
> +	     (vsie & SIP_LCOFIP);
> +	ie &= (unsigned long)mask;
>  	ie |= vcpu->arch.guest_csr.vsie & ~IRQ_LOCAL_MASK &
>  		(unsigned long)mask;
>  	ret = vcpu->arch.irqs_pending[0] & ie;
> 
> 
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