[PATCH] KVM: riscv: selftests: Dump sepc/scause/stval on vcpu_arch_dump()
Anup Patel
anup at brainfault.org
Fri Oct 9 03:07:26 PDT 2026
On Tue, Sep 1, 2026 at 5:57 AM Yong-Xuan Wang <yongxuan.wang at sifive.com> wrote:
>
> vcpu_arch_dump() omits trap-related CSRs, making it hard to diagnose
> unexpected guest exceptions from the dump output alone.
>
> Print sepc, scause, and stval alongside the existing register dump.
>
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang at sifive.com>
LGTM.
Reviewed-by: Anup Patel <anup at brainfault.org>
Queued this patch for Linux-7.4
Thanks,
Anup
> ---
> tools/testing/selftests/kvm/lib/riscv/processor.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c
> index ded5429f3448..bf355afa8486 100644
> --- a/tools/testing/selftests/kvm/lib/riscv/processor.c
> +++ b/tools/testing/selftests/kvm/lib/riscv/processor.c
> @@ -235,6 +235,7 @@ void riscv_vcpu_mmu_setup(struct kvm_vcpu *vcpu)
> void vcpu_arch_dump(FILE *stream, struct kvm_vcpu *vcpu, u8 indent)
> {
> struct kvm_riscv_core core;
> + struct kvm_riscv_csr general_csr;
>
> core.mode = vcpu_get_reg(vcpu, RISCV_CORE_REG(mode));
> core.regs.pc = vcpu_get_reg(vcpu, RISCV_CORE_REG(regs.pc));
> @@ -270,6 +271,10 @@ void vcpu_arch_dump(FILE *stream, struct kvm_vcpu *vcpu, u8 indent)
> core.regs.t5 = vcpu_get_reg(vcpu, RISCV_CORE_REG(regs.t5));
> core.regs.t6 = vcpu_get_reg(vcpu, RISCV_CORE_REG(regs.t6));
>
> + general_csr.sepc = vcpu_get_reg(vcpu, RISCV_GENERAL_CSR_REG(sepc));
> + general_csr.scause = vcpu_get_reg(vcpu, RISCV_GENERAL_CSR_REG(scause));
> + general_csr.stval = vcpu_get_reg(vcpu, RISCV_GENERAL_CSR_REG(stval));
> +
> fprintf(stream,
> " MODE: 0x%lx\n", core.mode);
> fprintf(stream,
> @@ -296,6 +301,9 @@ void vcpu_arch_dump(FILE *stream, struct kvm_vcpu *vcpu, u8 indent)
> fprintf(stream,
> " T3: 0x%016lx T4: 0x%016lx T5: 0x%016lx T6: 0x%016lx\n",
> core.regs.t3, core.regs.t4, core.regs.t5, core.regs.t6);
> + fprintf(stream,
> + "SEPC: 0x%016lx SCAUSE: 0x%016lx STVAL: 0x%016lx\n",
> + general_csr.sepc, general_csr.scause, general_csr.stval);
> }
>
> static void __aligned(16) guest_unexp_trap(void)
>
> ---
> base-commit: b5060a4aa33d7d78a8c1837ab08ef0c81ea96650
> change-id: 20260831-kvm_kselftest_dump-3f8d4daf5c60
>
More information about the kvm-riscv
mailing list