[kvm-unit-tests PATCH 16/16] x86: Move SEV MSR definitions to msr.h
Sean Christopherson
seanjc at google.com
Thu May 29 15:19:29 PDT 2025
Move the SEV MSR definitions to msr.h so that they're available for non-EFI
builds. There is nothing EFI specific about the architectural definitions.
Opportunistically massage the names to align with existing style.
No functional change intended.
Signed-off-by: Sean Christopherson <seanjc at google.com>
---
lib/x86/amd_sev.c | 8 ++++----
lib/x86/amd_sev.h | 14 --------------
lib/x86/msr.h | 6 ++++++
3 files changed, 10 insertions(+), 18 deletions(-)
diff --git a/lib/x86/amd_sev.c b/lib/x86/amd_sev.c
index 416e4423..7c6d2804 100644
--- a/lib/x86/amd_sev.c
+++ b/lib/x86/amd_sev.c
@@ -24,8 +24,8 @@ bool amd_sev_enabled(void)
if (!initialized) {
initialized = true;
- sev_enabled = this_cpu_has(X86_FEATURE_SEV)
- rdmsr(MSR_SEV_STATUS) & SEV_ENABLED_MASK);
+ sev_enabled = this_cpu_has(X86_FEATURE_SEV) &&
+ rdmsr(MSR_SEV_STATUS) & SEV_STATUS_SEV_ENABLED;
}
return sev_enabled;
@@ -52,7 +52,7 @@ bool amd_sev_es_enabled(void)
sev_es_enabled = amd_sev_enabled() &&
this_cpu_has(X86_FEATURE_SEV_ES) &&
- rdmsr(MSR_SEV_STATUS) & SEV_ES_ENABLED_MASK;
+ rdmsr(MSR_SEV_STATUS) & SEV_STATUS_SEV_ES_ENABLED;
}
return sev_es_enabled;
@@ -100,7 +100,7 @@ void setup_ghcb_pte(pgd_t *page_table)
pteval_t *pte;
/* Read the current GHCB page addr */
- ghcb_addr = rdmsr(SEV_ES_GHCB_MSR_INDEX);
+ ghcb_addr = rdmsr(MSR_SEV_ES_GHCB);
/* Search Level 1 page table entry for GHCB page */
pte = get_pte_level(page_table, (void *)ghcb_addr, 1);
diff --git a/lib/x86/amd_sev.h b/lib/x86/amd_sev.h
index daa33a05..9d587e2d 100644
--- a/lib/x86/amd_sev.h
+++ b/lib/x86/amd_sev.h
@@ -19,23 +19,9 @@
#include "asm/page.h"
#include "efi.h"
-/*
- * AMD Programmer's Manual Volume 2
- * - Section "SEV_STATUS MSR"
- */
-#define MSR_SEV_STATUS 0xc0010131
-#define SEV_ENABLED_MASK 0b1
-#define SEV_ES_ENABLED_MASK 0b10
-
bool amd_sev_enabled(void);
efi_status_t setup_amd_sev(void);
-/*
- * AMD Programmer's Manual Volume 2
- * - Section "GHCB"
- */
-#define SEV_ES_GHCB_MSR_INDEX 0xc0010130
-
bool amd_sev_es_enabled(void);
efi_status_t setup_amd_sev_es(void);
void setup_ghcb_pte(pgd_t *page_table);
diff --git a/lib/x86/msr.h b/lib/x86/msr.h
index 658d237f..ccfd6bdd 100644
--- a/lib/x86/msr.h
+++ b/lib/x86/msr.h
@@ -523,4 +523,10 @@
#define MSR_VM_IGNNE 0xc0010115
#define MSR_VM_HSAVE_PA 0xc0010117
+#define MSR_SEV_STATUS 0xc0010131
+#define SEV_STATUS_SEV_ENABLED BIT(0)
+#define SEV_STATUS_SEV_ES_ENABLED BIT(1)
+
+#define MSR_SEV_ES_GHCB 0xc0010130
+
#endif /* _X86_MSR_H_ */
--
2.49.0.1204.g71687c7c1d-goog
More information about the kvm-riscv
mailing list