[PATCH 1/5] RISC-V: KVM: Lazy enable hstateen IMSIC & ISEL bit
Radim Krčmář
rkrcmar at ventanamicro.com
Thu May 8 06:31:07 PDT 2025
2025-05-05T14:39:26-07:00, Atish Patra <atishp at rivosinc.com>:
> Currently, we enable the smstateen bit at vcpu configure time by
> only checking the presence of required ISA extensions.
>
> These bits are not required to be enabled if the guest never uses
> the corresponding architectural state. Enable the smstaeen bits
> at runtime lazily upon first access.
What is the advantage of enabling them lazily?
To make the trap useful, we would have to lazily perform initialization
of the AIA. I think it would require notable changes to AIA, though...
Thanks.
More information about the kvm-riscv
mailing list