[kvm-unit-tests PATCH v9 0/6] riscv: add SBI SSE extension tests
Clément Léger
cleger at rivosinc.com
Fri Mar 14 04:10:23 PDT 2025
This series adds tests for SBI SSE extension as well as needed
infrastructure for SSE support. It also adds test specific asm-offsets
generation to use custom OFFSET and DEFINE from the test directory.
---
V9:
- Use __ASSEMBLER__ instead of __ASSEMBLY__
- Remove extra spaces
- Use assert to check global event in
sse_global_event_set_current_hart()
- Tabulate SSE events names table
- Use sbi_sse_register() instead of sbi_sse_register_raw() in error
testing
- Move a report_pass() out of error path
- Rework all injection tests with better error handling
- Use an env var for sse event completion timeout
- Add timeout for some potentially infinite while() loops
V8:
- Short circuit current event tests if failure happens
- Remove SSE from all report strings
- Indent .prio field
- Add cpu_relax()/smp_rmb() where needed
- Add timeout for global event ENABLED state check
- Added BIT(32) aliases tests for attribute/event_id.
V7:
- Test ids/attributes/attributes count > 32 bits
- Rename all SSE function to sbi_sse_*
- Use event_id instead of event/evt
- Factorize read/write test
- Use virt_to_phys() for attributes read/write.
- Extensively use sbiret_report_error()
- Change check function return values to bool.
- Added assert for stack size to be below or equal to PAGE_SIZE
- Use en env variable for the maximum hart ID
- Check that individual read from attributes matches the multiple
attributes read.
- Added multiple attributes write at once
- Used READ_ONCE/WRITE_ONCE
- Inject all local event at once rather than looping fopr each core.
- Split test_arg for local_dispatch test so that all CPUs can run at
once.
- Move SSE entry and generic code to lib/riscv for other tests
- Fix unmask/mask state checking
V6:
- Add missing $(generated-file) dependencies for "-deps" objects
- Split SSE entry from sbi-asm.S to sse-asm.S and all SSE core functions
since it will be useful for other tests as well (dbltrp).
V5:
- Update event ranges based on latest spec
- Rename asm-offset-test.c to sbi-asm-offset.c
V4:
- Fix typo sbi_ext_ss_fid -> sbi_ext_sse_fid
- Add proper asm-offset generation for tests
- Move SSE specific file from lib/riscv to riscv/
V3:
- Add -deps variable for test specific dependencies
- Fix formatting errors/typo in sbi.h
- Add missing double trap event
- Alphabetize sbi-sse.c includes
- Fix a6 content after unmasking event
- Add SSE HART_MASK/UNMASK test
- Use mv instead of move
- move sbi_check_sse() definition in sbi.c
- Remove sbi_sse test from unitests.cfg
V2:
- Rebased on origin/master and integrate it into sbi.c tests
Clément Léger (6):
kbuild: Allow multiple asm-offsets file to be generated
riscv: Set .aux.o files as .PRECIOUS
riscv: Use asm-offsets to generate SBI_EXT_HSM values
riscv: lib: Add SBI SSE extension definitions
lib: riscv: Add SBI SSE support
riscv: sbi: Add SSE extension tests
scripts/asm-offsets.mak | 22 +-
riscv/Makefile | 5 +-
lib/riscv/asm/csr.h | 1 +
lib/riscv/asm/sbi.h | 142 ++++-
lib/riscv/sbi-sse-asm.S | 102 ++++
lib/riscv/asm-offsets.c | 9 +
lib/riscv/sbi.c | 76 +++
riscv/sbi-tests.h | 1 +
riscv/sbi-asm.S | 6 +-
riscv/sbi-asm-offsets.c | 11 +
riscv/sbi-sse.c | 1263 +++++++++++++++++++++++++++++++++++++++
riscv/sbi.c | 2 +
riscv/.gitignore | 1 +
13 files changed, 1630 insertions(+), 11 deletions(-)
create mode 100644 lib/riscv/sbi-sse-asm.S
create mode 100644 riscv/sbi-asm-offsets.c
create mode 100644 riscv/sbi-sse.c
create mode 100644 riscv/.gitignore
--
2.47.2
More information about the kvm-riscv
mailing list