From atishp at rivosinc.com  Mon Mar  3 12:53:27 2025
From: atishp at rivosinc.com (Atish Kumar Patra)
Date: Mon, 3 Mar 2025 12:53:27 -0800
Subject: [PATCH 3/4] KVM: riscv: selftests: Change command line option
In-Reply-To: <20250227-eb9e3d8de1de2ff609ac8f64@orel>
References: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com>
 <20250226-kvm_pmu_improve-v1-3-74c058c2bf6d@rivosinc.com> <20250227-eb9e3d8de1de2ff609ac8f64@orel>
Message-ID: <CAHBxVyF=gteGvQqbCAy88heLzfAWebuUH2PXud=zvMjmxsE0YA@mail.gmail.com>

On Thu, Feb 27, 2025 at 12:08?AM Andrew Jones <ajones at ventanamicro.com> wrote:
>
> On Wed, Feb 26, 2025 at 12:25:05PM -0800, Atish Patra wrote:
> > The PMU test commandline option takes an argument to disable a
> > certain test. The initial assumption behind this was a common use case
> > is just to run all the test most of the time. However, running a single
> > test seems more useful instead. Especially, the overflow test has been
> > helpful to validate PMU virtualizaiton interrupt changes.
> >
> > Switching the command line option to run a single test instead
> > of disabling a single test also allows to provide additional
> > test specific arguments to the test. The default without any options
> > remains unchanged which continues to run all the tests.
> >
> > Signed-off-by: Atish Patra <atishp at rivosinc.com>
> > ---
> >  tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 40 +++++++++++++++---------
> >  1 file changed, 26 insertions(+), 14 deletions(-)
> >
> > diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
> > index 284bc80193bd..533b76d0de82 100644
> > --- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
> > +++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
> > @@ -39,7 +39,11 @@ static bool illegal_handler_invoked;
> >  #define SBI_PMU_TEST_SNAPSHOT        BIT(2)
> >  #define SBI_PMU_TEST_OVERFLOW        BIT(3)
> >
> > -static int disabled_tests;
> > +struct test_args {
> > +     int disabled_tests;
> > +};
> > +
> > +static struct test_args targs;
> >
> >  unsigned long pmu_csr_read_num(int csr_num)
> >  {
> > @@ -604,7 +608,11 @@ static void test_vm_events_overflow(void *guest_code)
> >       vcpu_init_vector_tables(vcpu);
> >       /* Initialize guest timer frequency. */
> >       timer_freq = vcpu_get_reg(vcpu, RISCV_TIMER_REG(frequency));
> > +
> > +     /* Export the shared variables to the guest */
> >       sync_global_to_guest(vm, timer_freq);
> > +     sync_global_to_guest(vm, vcpu_shared_irq_count);
> > +     sync_global_to_guest(vm, targs);
> >
> >       run_vcpu(vcpu);
> >
> > @@ -613,28 +621,30 @@ static void test_vm_events_overflow(void *guest_code)
> >
> >  static void test_print_help(char *name)
> >  {
> > -     pr_info("Usage: %s [-h] [-d <test name>]\n", name);
> > -     pr_info("\t-d: Test to disable. Available tests are 'basic', 'events', 'snapshot', 'overflow'\n");
> > +     pr_info("Usage: %s [-h] [-t <test name>]\n", name);
> > +     pr_info("\t-t: Test to run (default all). Available tests are 'basic', 'events', 'snapshot', 'overflow'\n");
>
> It's probably fine to drop '-d', since we don't make any claims about
> support, but doing so does risk breaking some CI somewhere. If that
> potential breakage is a concern, then we could keep '-d', since nothing
> stops us from having both.

I don't think we have so much legacy usage with this test that we need
to maintain both options.
Since this was merged only a few cycles ago, I assume that it's not
available in many CI to cause breakage.
If somebody running CI actually shouts that it breaks their setup,
sure. Otherwise, I feel it will be just confusing to the users.

>
> >       pr_info("\t-h: print this help screen\n");
> >  }
> >
> >  static bool parse_args(int argc, char *argv[])
> >  {
> >       int opt;
> > -
> > -     while ((opt = getopt(argc, argv, "hd:")) != -1) {
> > +     int temp_disabled_tests = SBI_PMU_TEST_BASIC | SBI_PMU_TEST_EVENTS | SBI_PMU_TEST_SNAPSHOT |
> > +                               SBI_PMU_TEST_OVERFLOW;
> > +     while ((opt = getopt(argc, argv, "h:t:n:")) != -1) {
>
> '-h' doesn't need an argument and '-n' should be introduced with the next
> patch.
>

Yes. Thanks for catching it. I will fix it in v2.

> >               switch (opt) {
> > -             case 'd':
> > +             case 't':
> >                       if (!strncmp("basic", optarg, 5))
> > -                             disabled_tests |= SBI_PMU_TEST_BASIC;
> > +                             temp_disabled_tests &= ~SBI_PMU_TEST_BASIC;
> >                       else if (!strncmp("events", optarg, 6))
> > -                             disabled_tests |= SBI_PMU_TEST_EVENTS;
> > +                             temp_disabled_tests &= ~SBI_PMU_TEST_EVENTS;
> >                       else if (!strncmp("snapshot", optarg, 8))
> > -                             disabled_tests |= SBI_PMU_TEST_SNAPSHOT;
> > +                             temp_disabled_tests &= ~SBI_PMU_TEST_SNAPSHOT;
> >                       else if (!strncmp("overflow", optarg, 8))
> > -                             disabled_tests |= SBI_PMU_TEST_OVERFLOW;
> > +                             temp_disabled_tests &= ~SBI_PMU_TEST_OVERFLOW;
> >                       else
> >                               goto done;
> > +                     targs.disabled_tests = temp_disabled_tests;
> >                       break;
> >               case 'h':
> >               default:
> > @@ -650,25 +660,27 @@ static bool parse_args(int argc, char *argv[])
> >
> >  int main(int argc, char *argv[])
> >  {
> > +     targs.disabled_tests = 0;
> > +
> >       if (!parse_args(argc, argv))
> >               exit(KSFT_SKIP);
> >
> > -     if (!(disabled_tests & SBI_PMU_TEST_BASIC)) {
> > +     if (!(targs.disabled_tests & SBI_PMU_TEST_BASIC)) {
> >               test_vm_basic_test(test_pmu_basic_sanity);
> >               pr_info("SBI PMU basic test : PASS\n");
> >       }
> >
> > -     if (!(disabled_tests & SBI_PMU_TEST_EVENTS)) {
> > +     if (!(targs.disabled_tests & SBI_PMU_TEST_EVENTS)) {
> >               test_vm_events_test(test_pmu_events);
> >               pr_info("SBI PMU event verification test : PASS\n");
> >       }
> >
> > -     if (!(disabled_tests & SBI_PMU_TEST_SNAPSHOT)) {
> > +     if (!(targs.disabled_tests & SBI_PMU_TEST_SNAPSHOT)) {
> >               test_vm_events_snapshot_test(test_pmu_events_snaphost);
> >               pr_info("SBI PMU event verification with snapshot test : PASS\n");
> >       }
> >
> > -     if (!(disabled_tests & SBI_PMU_TEST_OVERFLOW)) {
> > +     if (!(targs.disabled_tests & SBI_PMU_TEST_OVERFLOW)) {
> >               test_vm_events_overflow(test_pmu_events_overflow);
> >               pr_info("SBI PMU event verification with overflow test : PASS\n");
> >       }
> >
> > --
> > 2.43.0
> >
>
> Otherwise,
>
> Reviewed-by: Andrew Jones <ajones at ventanamicro.com>


From atishp at rivosinc.com  Mon Mar  3 13:27:47 2025
From: atishp at rivosinc.com (Atish Kumar Patra)
Date: Mon, 3 Mar 2025 13:27:47 -0800
Subject: [PATCH 4/4] KVM: riscv: selftests: Allow number of interrupts to
 be configurable
In-Reply-To: <20250227-f7b303813dab128b5060b0c3@orel>
References: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com>
 <20250226-kvm_pmu_improve-v1-4-74c058c2bf6d@rivosinc.com> <20250227-f7b303813dab128b5060b0c3@orel>
Message-ID: <CAHBxVyGGw6Ur4Kdd8Vvwp6viKWPx64w7gNvNiUzmAGeXF2PGoA@mail.gmail.com>

On Thu, Feb 27, 2025 at 12:16?AM Andrew Jones <ajones at ventanamicro.com> wrote:
>
> On Wed, Feb 26, 2025 at 12:25:06PM -0800, Atish Patra wrote:
> > It is helpful to vary the number of the LCOFI interrupts generated
> > by the overflow test. Allow additional argument for overflow test
> > to accommodate that. It can be easily cross-validated with
> > /proc/interrupts output in the host.
> >
> > Signed-off-by: Atish Patra <atishp at rivosinc.com>
> > ---
> >  tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 36 ++++++++++++++++++++----
> >  1 file changed, 30 insertions(+), 6 deletions(-)
> >
> > diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
> > index 533b76d0de82..7c273a1adb17 100644
> > --- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
> > +++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
> > @@ -39,8 +39,10 @@ static bool illegal_handler_invoked;
> >  #define SBI_PMU_TEST_SNAPSHOT        BIT(2)
> >  #define SBI_PMU_TEST_OVERFLOW        BIT(3)
> >
> > +#define SBI_PMU_OVERFLOW_IRQNUM_DEFAULT 5
> >  struct test_args {
> >       int disabled_tests;
> > +     int overflow_irqnum;
> >  };
> >
> >  static struct test_args targs;
> > @@ -478,7 +480,7 @@ static void test_pmu_events_snaphost(void)
> >
> >  static void test_pmu_events_overflow(void)
> >  {
> > -     int num_counters = 0;
> > +     int num_counters = 0, i = 0;
> >
> >       /* Verify presence of SBI PMU and minimum requrired SBI version */
> >       verify_sbi_requirement_assert();
> > @@ -495,11 +497,15 @@ static void test_pmu_events_overflow(void)
> >        * Qemu supports overflow for cycle/instruction.
> >        * This test may fail on any platform that do not support overflow for these two events.
> >        */
> > -     test_pmu_event_overflow(SBI_PMU_HW_CPU_CYCLES);
> > -     GUEST_ASSERT_EQ(vcpu_shared_irq_count, 1);
> > +     for (i = 0; i < targs.overflow_irqnum; i++)
> > +             test_pmu_event_overflow(SBI_PMU_HW_CPU_CYCLES);
> > +     GUEST_ASSERT_EQ(vcpu_shared_irq_count, targs.overflow_irqnum);
> > +
> > +     vcpu_shared_irq_count = 0;
> >
> > -     test_pmu_event_overflow(SBI_PMU_HW_INSTRUCTIONS);
> > -     GUEST_ASSERT_EQ(vcpu_shared_irq_count, 2);
> > +     for (i = 0; i < targs.overflow_irqnum; i++)
> > +             test_pmu_event_overflow(SBI_PMU_HW_INSTRUCTIONS);
> > +     GUEST_ASSERT_EQ(vcpu_shared_irq_count, targs.overflow_irqnum);
> >
> >       GUEST_DONE();
> >  }
> > @@ -621,8 +627,11 @@ static void test_vm_events_overflow(void *guest_code)
> >
> >  static void test_print_help(char *name)
> >  {
> > -     pr_info("Usage: %s [-h] [-t <test name>]\n", name);
> > +     pr_info("Usage: %s [-h] [-t <test name>] [-n <number of LCOFI interrupt for overflow test>]\n",
> > +             name);
> >       pr_info("\t-t: Test to run (default all). Available tests are 'basic', 'events', 'snapshot', 'overflow'\n");
> > +     pr_info("\t-n: Number of LCOFI interrupt to trigger for each event in overflow test (default: %d)\n",
> > +             SBI_PMU_OVERFLOW_IRQNUM_DEFAULT);
> >       pr_info("\t-h: print this help screen\n");
> >  }
> >
> > @@ -631,6 +640,8 @@ static bool parse_args(int argc, char *argv[])
> >       int opt;
> >       int temp_disabled_tests = SBI_PMU_TEST_BASIC | SBI_PMU_TEST_EVENTS | SBI_PMU_TEST_SNAPSHOT |
> >                                 SBI_PMU_TEST_OVERFLOW;
> > +     int overflow_interrupts = -1;
>
> Initializing to -1 made me think that '-n 0' would be valid and a way to
> disable the overflow test, but...
>

Is there any benefit ? I found it much more convenient to select a
single test and run instead of disabling
a single test.

Once you single or a set of tests, all other tests are disabled anyways.

> > +
> >       while ((opt = getopt(argc, argv, "h:t:n:")) != -1) {
> >               switch (opt) {
> >               case 't':
> > @@ -646,12 +657,24 @@ static bool parse_args(int argc, char *argv[])
> >                               goto done;
> >                       targs.disabled_tests = temp_disabled_tests;
> >                       break;
> > +             case 'n':
> > +                     overflow_interrupts = atoi_positive("Number of LCOFI", optarg);
>
> ...here we use atoi_positive() and...
>
> > +                     break;
> >               case 'h':
> >               default:
> >                       goto done;
> >               }
> >       }
> >
> > +     if (overflow_interrupts > 0) {
>
> ...here we only change from the default of 5 for nonzero.
>
> Should we allow '-n 0'? Otherwise overflow_interrupts can be initialized
> to zero (not that it matters).
>

I will change the default value to 0 to avoid ambiguity for now.
Please let me know if you strongly think we should support -n 0.
We can always support it. I just don't see the point of specifying the
test with options to disable it anymore.

> > +             if (targs.disabled_tests & SBI_PMU_TEST_OVERFLOW) {
> > +                     pr_info("-n option is only available for overflow test\n");
> > +                     goto done;
> > +             } else {
> > +                     targs.overflow_irqnum = overflow_interrupts;
> > +             }
> > +     }
> > +
> >       return true;
> >  done:
> >       test_print_help(argv[0]);
> > @@ -661,6 +684,7 @@ static bool parse_args(int argc, char *argv[])
> >  int main(int argc, char *argv[])
> >  {
> >       targs.disabled_tests = 0;
> > +     targs.overflow_irqnum = SBI_PMU_OVERFLOW_IRQNUM_DEFAULT;
> >
> >       if (!parse_args(argc, argv))
> >               exit(KSFT_SKIP);
> >
> > --
> > 2.43.0
> >
>
> Thanks,
> drew


From atishp at rivosinc.com  Mon Mar  3 14:53:05 2025
From: atishp at rivosinc.com (Atish Patra)
Date: Mon, 03 Mar 2025 14:53:05 -0800
Subject: [PATCH v2 0/4] RISC-V KVM PMU fix and selftest improvement
Message-ID: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>

This series adds a fix for KVM PMU code and improves the pmu selftest
by allowing generating precise number of interrupts. It also provided
another additional option to the overflow test that allows user to
generate custom number of LCOFI interrupts.

Signed-off-by: Atish Patra <atishp at rivosinc.com>
---
Changes in v2:
- Initialized the local overflow irq variable to 0 indicate that it's not a
  allowed value. 
- Moved the introduction of argument option `n` to the last patch. 
- Link to v1: https://lore.kernel.org/r/20250226-kvm_pmu_improve-v1-0-74c058c2bf6d at rivosinc.com

---
Atish Patra (4):
      RISC-V: KVM: Disable the kernel perf counter during configure
      KVM: riscv: selftests: Do not start the counter in the overflow handler
      KVM: riscv: selftests: Change command line option
      KVM: riscv: selftests: Allow number of interrupts to be configurable

 arch/riscv/kvm/vcpu_pmu.c                        |  1 +
 tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 81 ++++++++++++++++--------
 2 files changed, 57 insertions(+), 25 deletions(-)
---
base-commit: 0ad2507d5d93f39619fc42372c347d6006b64319
change-id: 20250225-kvm_pmu_improve-fffd038b2404
--
Regards,
Atish patra



From atishp at rivosinc.com  Mon Mar  3 14:53:06 2025
From: atishp at rivosinc.com (Atish Patra)
Date: Mon, 03 Mar 2025 14:53:06 -0800
Subject: [PATCH v2 1/4] RISC-V: KVM: Disable the kernel perf counter during
 configure
In-Reply-To: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
References: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
Message-ID: <20250303-kvm_pmu_improve-v2-1-41d177e45929@rivosinc.com>

The perf event should be marked disabled during the creation as
it is not ready to be scheduled until there is SBI PMU start call
or config matching is called with auto start. Otherwise, event add/start
gets called during perf_event_create_kernel_counter function.
It will be enabled and scheduled to run via perf_event_enable during
either the above mentioned scenario.

Fixes: 0cb74b65d2e5 ("RISC-V: KVM: Implement perf support without sampling")

Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
Signed-off-by: Atish Patra <atishp at rivosinc.com>
---
 arch/riscv/kvm/vcpu_pmu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c
index 2707a51b082c..78ac3216a54d 100644
--- a/arch/riscv/kvm/vcpu_pmu.c
+++ b/arch/riscv/kvm/vcpu_pmu.c
@@ -666,6 +666,7 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *vcpu, unsigned long ctr_ba
 		.type = etype,
 		.size = sizeof(struct perf_event_attr),
 		.pinned = true,
+		.disabled = true,
 		/*
 		 * It should never reach here if the platform doesn't support the sscofpmf
 		 * extension as mode filtering won't work without it.

-- 
2.43.0



From atishp at rivosinc.com  Mon Mar  3 14:53:07 2025
From: atishp at rivosinc.com (Atish Patra)
Date: Mon, 03 Mar 2025 14:53:07 -0800
Subject: [PATCH v2 2/4] KVM: riscv: selftests: Do not start the counter in
 the overflow handler
In-Reply-To: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
References: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
Message-ID: <20250303-kvm_pmu_improve-v2-2-41d177e45929@rivosinc.com>

There is no need to start the counter in the overflow handler as we
intend to trigger precise number of LCOFI interrupts through these
tests. The overflow irq handler has already stopped the counter. As
a result, the stop call from the test function may return already
stopped error which is fine as well.

Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
Signed-off-by: Atish Patra <atishp at rivosinc.com>
---
 tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
index f45c0ecc902d..284bc80193bd 100644
--- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
+++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
@@ -118,8 +118,8 @@ static void stop_counter(unsigned long counter, unsigned long stop_flags)
 
 	ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, counter, 1, stop_flags,
 			0, 0, 0);
-	__GUEST_ASSERT(ret.error == 0, "Unable to stop counter %ld error %ld\n",
-			       counter, ret.error);
+	__GUEST_ASSERT(ret.error == 0 || ret.error == SBI_ERR_ALREADY_STOPPED,
+		       "Unable to stop counter %ld error %ld\n", counter, ret.error);
 }
 
 static void guest_illegal_exception_handler(struct ex_regs *regs)
@@ -137,7 +137,6 @@ static void guest_irq_handler(struct ex_regs *regs)
 	unsigned int irq_num = regs->cause & ~CAUSE_IRQ_FLAG;
 	struct riscv_pmu_snapshot_data *snapshot_data = snapshot_gva;
 	unsigned long overflown_mask;
-	unsigned long counter_val = 0;
 
 	/* Validate that we are in the correct irq handler */
 	GUEST_ASSERT_EQ(irq_num, IRQ_PMU_OVF);
@@ -151,10 +150,6 @@ static void guest_irq_handler(struct ex_regs *regs)
 	GUEST_ASSERT(overflown_mask & 0x01);
 
 	WRITE_ONCE(vcpu_shared_irq_count, vcpu_shared_irq_count+1);
-
-	counter_val = READ_ONCE(snapshot_data->ctr_values[0]);
-	/* Now start the counter to mimick the real driver behavior */
-	start_counter(counter_in_use, SBI_PMU_START_FLAG_SET_INIT_VALUE, counter_val);
 }
 
 static unsigned long get_counter_index(unsigned long cbase, unsigned long cmask,

-- 
2.43.0



From atishp at rivosinc.com  Mon Mar  3 14:53:08 2025
From: atishp at rivosinc.com (Atish Patra)
Date: Mon, 03 Mar 2025 14:53:08 -0800
Subject: [PATCH v2 3/4] KVM: riscv: selftests: Change command line option
In-Reply-To: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
References: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
Message-ID: <20250303-kvm_pmu_improve-v2-3-41d177e45929@rivosinc.com>

The PMU test commandline option takes an argument to disable a
certain test. The initial assumption behind this was a common use case
is just to run all the test most of the time. However, running a single
test seems more useful instead. Especially, the overflow test has been
helpful to validate PMU virtualizaiton interrupt changes.

Switching the command line option to run a single test instead
of disabling a single test also allows to provide additional
test specific arguments to the test. The default without any options
remains unchanged which continues to run all the tests.

Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
Signed-off-by: Atish Patra <atishp at rivosinc.com>
---
 tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 40 +++++++++++++++---------
 1 file changed, 26 insertions(+), 14 deletions(-)

diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
index 284bc80193bd..de66099235d9 100644
--- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
+++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
@@ -39,7 +39,11 @@ static bool illegal_handler_invoked;
 #define SBI_PMU_TEST_SNAPSHOT	BIT(2)
 #define SBI_PMU_TEST_OVERFLOW	BIT(3)
 
-static int disabled_tests;
+struct test_args {
+	int disabled_tests;
+};
+
+static struct test_args targs;
 
 unsigned long pmu_csr_read_num(int csr_num)
 {
@@ -604,7 +608,11 @@ static void test_vm_events_overflow(void *guest_code)
 	vcpu_init_vector_tables(vcpu);
 	/* Initialize guest timer frequency. */
 	timer_freq = vcpu_get_reg(vcpu, RISCV_TIMER_REG(frequency));
+
+	/* Export the shared variables to the guest */
 	sync_global_to_guest(vm, timer_freq);
+	sync_global_to_guest(vm, vcpu_shared_irq_count);
+	sync_global_to_guest(vm, targs);
 
 	run_vcpu(vcpu);
 
@@ -613,28 +621,30 @@ static void test_vm_events_overflow(void *guest_code)
 
 static void test_print_help(char *name)
 {
-	pr_info("Usage: %s [-h] [-d <test name>]\n", name);
-	pr_info("\t-d: Test to disable. Available tests are 'basic', 'events', 'snapshot', 'overflow'\n");
+	pr_info("Usage: %s [-h] [-t <test name>]\n", name);
+	pr_info("\t-t: Test to run (default all). Available tests are 'basic', 'events', 'snapshot', 'overflow'\n");
 	pr_info("\t-h: print this help screen\n");
 }
 
 static bool parse_args(int argc, char *argv[])
 {
 	int opt;
-
-	while ((opt = getopt(argc, argv, "hd:")) != -1) {
+	int temp_disabled_tests = SBI_PMU_TEST_BASIC | SBI_PMU_TEST_EVENTS | SBI_PMU_TEST_SNAPSHOT |
+				  SBI_PMU_TEST_OVERFLOW;
+	while ((opt = getopt(argc, argv, "ht:")) != -1) {
 		switch (opt) {
-		case 'd':
+		case 't':
 			if (!strncmp("basic", optarg, 5))
-				disabled_tests |= SBI_PMU_TEST_BASIC;
+				temp_disabled_tests &= ~SBI_PMU_TEST_BASIC;
 			else if (!strncmp("events", optarg, 6))
-				disabled_tests |= SBI_PMU_TEST_EVENTS;
+				temp_disabled_tests &= ~SBI_PMU_TEST_EVENTS;
 			else if (!strncmp("snapshot", optarg, 8))
-				disabled_tests |= SBI_PMU_TEST_SNAPSHOT;
+				temp_disabled_tests &= ~SBI_PMU_TEST_SNAPSHOT;
 			else if (!strncmp("overflow", optarg, 8))
-				disabled_tests |= SBI_PMU_TEST_OVERFLOW;
+				temp_disabled_tests &= ~SBI_PMU_TEST_OVERFLOW;
 			else
 				goto done;
+			targs.disabled_tests = temp_disabled_tests;
 			break;
 		case 'h':
 		default:
@@ -650,25 +660,27 @@ static bool parse_args(int argc, char *argv[])
 
 int main(int argc, char *argv[])
 {
+	targs.disabled_tests = 0;
+
 	if (!parse_args(argc, argv))
 		exit(KSFT_SKIP);
 
-	if (!(disabled_tests & SBI_PMU_TEST_BASIC)) {
+	if (!(targs.disabled_tests & SBI_PMU_TEST_BASIC)) {
 		test_vm_basic_test(test_pmu_basic_sanity);
 		pr_info("SBI PMU basic test : PASS\n");
 	}
 
-	if (!(disabled_tests & SBI_PMU_TEST_EVENTS)) {
+	if (!(targs.disabled_tests & SBI_PMU_TEST_EVENTS)) {
 		test_vm_events_test(test_pmu_events);
 		pr_info("SBI PMU event verification test : PASS\n");
 	}
 
-	if (!(disabled_tests & SBI_PMU_TEST_SNAPSHOT)) {
+	if (!(targs.disabled_tests & SBI_PMU_TEST_SNAPSHOT)) {
 		test_vm_events_snapshot_test(test_pmu_events_snaphost);
 		pr_info("SBI PMU event verification with snapshot test : PASS\n");
 	}
 
-	if (!(disabled_tests & SBI_PMU_TEST_OVERFLOW)) {
+	if (!(targs.disabled_tests & SBI_PMU_TEST_OVERFLOW)) {
 		test_vm_events_overflow(test_pmu_events_overflow);
 		pr_info("SBI PMU event verification with overflow test : PASS\n");
 	}

-- 
2.43.0



From atishp at rivosinc.com  Mon Mar  3 14:53:09 2025
From: atishp at rivosinc.com (Atish Patra)
Date: Mon, 03 Mar 2025 14:53:09 -0800
Subject: [PATCH v2 4/4] KVM: riscv: selftests: Allow number of interrupts
 to be configurable
In-Reply-To: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
References: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
Message-ID: <20250303-kvm_pmu_improve-v2-4-41d177e45929@rivosinc.com>

It is helpful to vary the number of the LCOFI interrupts generated
by the overflow test. Allow additional argument for overflow test
to accommodate that. It can be easily cross-validated with
/proc/interrupts output in the host.

Signed-off-by: Atish Patra <atishp at rivosinc.com>
---
 tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 38 +++++++++++++++++++-----
 1 file changed, 31 insertions(+), 7 deletions(-)

diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
index de66099235d9..03406de4989d 100644
--- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
+++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c
@@ -39,8 +39,10 @@ static bool illegal_handler_invoked;
 #define SBI_PMU_TEST_SNAPSHOT	BIT(2)
 #define SBI_PMU_TEST_OVERFLOW	BIT(3)
 
+#define SBI_PMU_OVERFLOW_IRQNUM_DEFAULT 5
 struct test_args {
 	int disabled_tests;
+	int overflow_irqnum;
 };
 
 static struct test_args targs;
@@ -478,7 +480,7 @@ static void test_pmu_events_snaphost(void)
 
 static void test_pmu_events_overflow(void)
 {
-	int num_counters = 0;
+	int num_counters = 0, i = 0;
 
 	/* Verify presence of SBI PMU and minimum requrired SBI version */
 	verify_sbi_requirement_assert();
@@ -495,11 +497,15 @@ static void test_pmu_events_overflow(void)
 	 * Qemu supports overflow for cycle/instruction.
 	 * This test may fail on any platform that do not support overflow for these two events.
 	 */
-	test_pmu_event_overflow(SBI_PMU_HW_CPU_CYCLES);
-	GUEST_ASSERT_EQ(vcpu_shared_irq_count, 1);
+	for (i = 0; i < targs.overflow_irqnum; i++)
+		test_pmu_event_overflow(SBI_PMU_HW_CPU_CYCLES);
+	GUEST_ASSERT_EQ(vcpu_shared_irq_count, targs.overflow_irqnum);
+
+	vcpu_shared_irq_count = 0;
 
-	test_pmu_event_overflow(SBI_PMU_HW_INSTRUCTIONS);
-	GUEST_ASSERT_EQ(vcpu_shared_irq_count, 2);
+	for (i = 0; i < targs.overflow_irqnum; i++)
+		test_pmu_event_overflow(SBI_PMU_HW_INSTRUCTIONS);
+	GUEST_ASSERT_EQ(vcpu_shared_irq_count, targs.overflow_irqnum);
 
 	GUEST_DONE();
 }
@@ -621,8 +627,11 @@ static void test_vm_events_overflow(void *guest_code)
 
 static void test_print_help(char *name)
 {
-	pr_info("Usage: %s [-h] [-t <test name>]\n", name);
+	pr_info("Usage: %s [-h] [-t <test name>] [-n <number of LCOFI interrupt for overflow test>]\n",
+		name);
 	pr_info("\t-t: Test to run (default all). Available tests are 'basic', 'events', 'snapshot', 'overflow'\n");
+	pr_info("\t-n: Number of LCOFI interrupt to trigger for each event in overflow test (default: %d)\n",
+		SBI_PMU_OVERFLOW_IRQNUM_DEFAULT);
 	pr_info("\t-h: print this help screen\n");
 }
 
@@ -631,7 +640,9 @@ static bool parse_args(int argc, char *argv[])
 	int opt;
 	int temp_disabled_tests = SBI_PMU_TEST_BASIC | SBI_PMU_TEST_EVENTS | SBI_PMU_TEST_SNAPSHOT |
 				  SBI_PMU_TEST_OVERFLOW;
-	while ((opt = getopt(argc, argv, "ht:")) != -1) {
+	int overflow_interrupts = 0;
+
+	while ((opt = getopt(argc, argv, "ht:n:")) != -1) {
 		switch (opt) {
 		case 't':
 			if (!strncmp("basic", optarg, 5))
@@ -646,12 +657,24 @@ static bool parse_args(int argc, char *argv[])
 				goto done;
 			targs.disabled_tests = temp_disabled_tests;
 			break;
+		case 'n':
+			overflow_interrupts = atoi_positive("Number of LCOFI", optarg);
+			break;
 		case 'h':
 		default:
 			goto done;
 		}
 	}
 
+	if (overflow_interrupts > 0) {
+		if (targs.disabled_tests & SBI_PMU_TEST_OVERFLOW) {
+			pr_info("-n option is only available for overflow test\n");
+			goto done;
+		} else {
+			targs.overflow_irqnum = overflow_interrupts;
+		}
+	}
+
 	return true;
 done:
 	test_print_help(argv[0]);
@@ -661,6 +684,7 @@ static bool parse_args(int argc, char *argv[])
 int main(int argc, char *argv[])
 {
 	targs.disabled_tests = 0;
+	targs.overflow_irqnum = SBI_PMU_OVERFLOW_IRQNUM_DEFAULT;
 
 	if (!parse_args(argc, argv))
 		exit(KSFT_SKIP);

-- 
2.43.0



From ajones at ventanamicro.com  Tue Mar  4 00:58:15 2025
From: ajones at ventanamicro.com (Andrew Jones)
Date: Tue, 4 Mar 2025 09:58:15 +0100
Subject: [PATCH 4/4] KVM: riscv: selftests: Allow number of interrupts to
 be configurable
In-Reply-To: <CAHBxVyGGw6Ur4Kdd8Vvwp6viKWPx64w7gNvNiUzmAGeXF2PGoA@mail.gmail.com>
References: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com>
 <20250226-kvm_pmu_improve-v1-4-74c058c2bf6d@rivosinc.com>
 <20250227-f7b303813dab128b5060b0c3@orel>
 <CAHBxVyGGw6Ur4Kdd8Vvwp6viKWPx64w7gNvNiUzmAGeXF2PGoA@mail.gmail.com>
Message-ID: <20250304-5a85b3a246f14f60f61a45e0@orel>

On Mon, Mar 03, 2025 at 01:27:47PM -0800, Atish Kumar Patra wrote:
> On Thu, Feb 27, 2025 at 12:16?AM Andrew Jones <ajones at ventanamicro.com> wrote:
> >
> > On Wed, Feb 26, 2025 at 12:25:06PM -0800, Atish Patra wrote:
...
> I will change the default value to 0 to avoid ambiguity for now.
> Please let me know if you strongly think we should support -n 0.
> We can always support it. I just don't see the point of specifying the
> test with options to disable it anymore.
>

I don't mind not supporting '-n 0'.

Thanks,
drew


From ajones at ventanamicro.com  Tue Mar  4 01:00:41 2025
From: ajones at ventanamicro.com (Andrew Jones)
Date: Tue, 4 Mar 2025 10:00:41 +0100
Subject: [PATCH v2 4/4] KVM: riscv: selftests: Allow number of interrupts
 to be configurable
In-Reply-To: <20250303-kvm_pmu_improve-v2-4-41d177e45929@rivosinc.com>
References: <20250303-kvm_pmu_improve-v2-0-41d177e45929@rivosinc.com>
 <20250303-kvm_pmu_improve-v2-4-41d177e45929@rivosinc.com>
Message-ID: <20250304-bb96798e9a1fd292430df3e8@orel>

On Mon, Mar 03, 2025 at 02:53:09PM -0800, Atish Patra wrote:
> It is helpful to vary the number of the LCOFI interrupts generated
> by the overflow test. Allow additional argument for overflow test
> to accommodate that. It can be easily cross-validated with
> /proc/interrupts output in the host.
> 
> Signed-off-by: Atish Patra <atishp at rivosinc.com>
> ---
>  tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 38 +++++++++++++++++++-----
>  1 file changed, 31 insertions(+), 7 deletions(-)
>

Reviewed-by: Andrew Jones <ajones at ventanamicro.com>


From andrew.jones at linux.dev  Tue Mar  4 01:12:30 2025
From: andrew.jones at linux.dev (Andrew Jones)
Date: Tue, 4 Mar 2025 10:12:30 +0100
Subject: [kvm-unit-tests PATCH 1/2] configure: Allow earlycon for all
 architectures
In-Reply-To: <20250221162753.126290-5-andrew.jones@linux.dev>
References: <20250221162753.126290-4-andrew.jones@linux.dev>
 <20250221162753.126290-5-andrew.jones@linux.dev>
Message-ID: <20250304-4e2ee456d30819f9a38239c8@orel>

On Fri, Feb 21, 2025 at 05:27:55PM +0100, Andrew Jones wrote:
> From: Andrew Jones <ajones at ventanamicro.com>
> 
> earlycon could be used by any architecture so check it outside the
> arm block and apply it to riscv right away.
> 
> Signed-off-by: Andrew Jones <ajones at ventanamicro.com>
> ---
>  configure | 88 +++++++++++++++++++++++++++----------------------------
>  1 file changed, 43 insertions(+), 45 deletions(-)
> 
> diff --git a/configure b/configure
> index 86cf1da36467..7e462aaf1190 100755
> --- a/configure
> +++ b/configure
> @@ -78,10 +78,9 @@ usage() {
>  	                           4k [default], 16k, 64k for arm64.
>  	                           4k [default], 64k for ppc64.
>  	    --earlycon=EARLYCON
> -	                           Specify the UART name, type and address (optional, arm and
> -	                           arm64 only). The specified address will overwrite the UART
> -	                           address set by the --target option. EARLYCON can be one of
> -	                           (case sensitive):
> +				   Specify the UART name, type and address (optional).
> +	                           The specified address will overwrite the UART address set by
> +	                           the --target option. EARLYCON can be one of (case sensitive):

I'll add
                                   (arm/arm64 and riscv32/riscv64 only)

since no other architecture is paying attention to the parameter at this
time.

Thanks,
drew

>  	               uart[8250],mmio,ADDR
>  	                           Specify an 8250 compatible UART at address ADDR. Supported
>  	                           register stride is 8 bit only.
> @@ -283,6 +282,41 @@ else
>      fi
>  fi
>  
> +if [ "$earlycon" ]; then
> +    IFS=, read -r name type_addr addr <<<"$earlycon"
> +    if [ "$name" != "uart" ] && [ "$name" != "uart8250" ] && [ "$name" != "pl011" ]; then
> +        echo "unknown earlycon name: $name"
> +        usage
> +    fi
> +
> +    if [ "$name" = "pl011" ]; then
> +        if [ -z "$addr" ]; then
> +            addr=$type_addr
> +        else
> +            if [ "$type_addr" != "mmio32" ]; then
> +                echo "unknown $name earlycon type: $type_addr"
> +                usage
> +            fi
> +        fi
> +    else
> +        if [ "$type_addr" != "mmio" ]; then
> +            echo "unknown $name earlycon type: $type_addr"
> +            usage
> +        fi
> +    fi
> +
> +    if [ -z "$addr" ]; then
> +        echo "missing $name earlycon address"
> +        usage
> +    fi
> +    if [[ $addr =~ ^0(x|X)[0-9a-fA-F]+$ ]] || [[ $addr =~ ^[0-9]+$ ]]; then
> +        uart_early_addr=$addr
> +    else
> +        echo "invalid $name earlycon address: $addr"
> +        usage
> +    fi
> +fi
> +
>  [ -z "$processor" ] && processor="$arch"
>  
>  if [ "$processor" = "arm64" ]; then
> @@ -296,51 +330,14 @@ if [ "$arch" = "i386" ] || [ "$arch" = "x86_64" ]; then
>  elif [ "$arch" = "arm" ] || [ "$arch" = "arm64" ]; then
>      testdir=arm
>      if [ "$target" = "qemu" ]; then
> -        arm_uart_early_addr=0x09000000
> +        : "${uart_early_addr:=0x9000000}"
>      elif [ "$target" = "kvmtool" ]; then
> -        arm_uart_early_addr=0x1000000
> +        : "${uart_early_addr:=0x1000000}"
>          errata_force=1
>      else
>          echo "--target must be one of 'qemu' or 'kvmtool'!"
>          usage
>      fi
> -
> -    if [ "$earlycon" ]; then
> -        IFS=, read -r name type_addr addr <<<"$earlycon"
> -        if [ "$name" != "uart" ] && [ "$name" != "uart8250" ] &&
> -                [ "$name" != "pl011" ]; then
> -            echo "unknown earlycon name: $name"
> -            usage
> -        fi
> -
> -        if [ "$name" = "pl011" ]; then
> -            if [ -z "$addr" ]; then
> -                addr=$type_addr
> -            else
> -                if [ "$type_addr" != "mmio32" ]; then
> -                    echo "unknown $name earlycon type: $type_addr"
> -                    usage
> -                fi
> -            fi
> -        else
> -            if [ "$type_addr" != "mmio" ]; then
> -                echo "unknown $name earlycon type: $type_addr"
> -                usage
> -            fi
> -        fi
> -
> -        if [ -z "$addr" ]; then
> -            echo "missing $name earlycon address"
> -            usage
> -        fi
> -        if [[ $addr =~ ^0(x|X)[0-9a-fA-F]+$ ]] ||
> -                [[ $addr =~ ^[0-9]+$ ]]; then
> -            arm_uart_early_addr=$addr
> -        else
> -            echo "invalid $name earlycon address: $addr"
> -            usage
> -        fi
> -    fi
>  elif [ "$arch" = "ppc64" ]; then
>      testdir=powerpc
>      firmware="$testdir/boot_rom.bin"
> @@ -351,6 +348,7 @@ elif [ "$arch" = "ppc64" ]; then
>  elif [ "$arch" = "riscv32" ] || [ "$arch" = "riscv64" ]; then
>      testdir=riscv
>      arch_libdir=riscv
> +    : "${uart_early_addr:=0x10000000}"
>  elif [ "$arch" = "s390x" ]; then
>      testdir=s390x
>  else
> @@ -491,7 +489,7 @@ EOF
>  if [ "$arch" = "arm" ] || [ "$arch" = "arm64" ]; then
>  cat <<EOF >> lib/config.h
>  
> -#define CONFIG_UART_EARLY_BASE ${arm_uart_early_addr}
> +#define CONFIG_UART_EARLY_BASE ${uart_early_addr}
>  #define CONFIG_ERRATA_FORCE ${errata_force}
>  
>  EOF
> @@ -506,7 +504,7 @@ EOF
>  elif [ "$arch" = "riscv32" ] || [ "$arch" = "riscv64" ]; then
>  cat <<EOF >> lib/config.h
>  
> -#define CONFIG_UART_EARLY_BASE 0x10000000
> +#define CONFIG_UART_EARLY_BASE ${uart_early_addr}
>  
>  EOF
>  fi
> -- 
> 2.48.1
> 


From andrew.jones at linux.dev  Tue Mar  4 01:31:21 2025
From: andrew.jones at linux.dev (Andrew Jones)
Date: Tue, 4 Mar 2025 10:31:21 +0100
Subject: [kvm-unit-tests PATCH v2 00/11] riscv: sbi: Test improvements
 and a couple new
In-Reply-To: <20250227141946.91604-13-andrew.jones@linux.dev>
References: <20250227141946.91604-13-andrew.jones@linux.dev>
Message-ID: <20250304-d6467defdcdc60f372296de0@orel>

On Thu, Feb 27, 2025 at 03:19:24PM +0100, Andrew Jones wrote:
> Improvements:
>  - Ensure system suspend test won't hang
>  - Ensure HSM suspend tests won't hang
>  - Ensure state is cleaned up at the end of one extension's test before
>    starting another
>  - Probe SUSP and skip cleanly
>  - Minor SUSP test output improvement
>  - Dropped upper bits fwft test for misaligned_exc_deleg
> 
> New tests:
>  - Check bad FIDs for all extensions
>  - Check SUSP sleep_type upper bits are ignored on RV64
>  - FWFT pte-hw-ad-updating tests
> 
> v2:
>  - Dropped upper bits fwft test for misaligned_exc_deleg rather than
>    change to kfail
>  - Added FWFT pte-hw-ad-updating tests
>  - Added a couple Cl?ment tags
>

Merged.

Thanks,
drew


From andrew.jones at linux.dev  Tue Mar  4 01:31:48 2025
From: andrew.jones at linux.dev (Andrew Jones)
Date: Tue, 4 Mar 2025 10:31:48 +0100
Subject: [kvm-unit-tests PATCH 0/2] riscv: Run with other QEMU models
In-Reply-To: <20250221162753.126290-4-andrew.jones@linux.dev>
References: <20250221162753.126290-4-andrew.jones@linux.dev>
Message-ID: <20250304-47806ddca2d868f97d63de6b@orel>

On Fri, Feb 21, 2025 at 05:27:54PM +0100, Andrew Jones wrote:
> Provide a couple patches allowing a QEMU machine model other than 'virt'
> to be used. We just need to be able to override 'virt' in the command
> line and it's also nice to be able to specify a different UART address
> for any early (pre DT parsing) outputs. 
> 
> Andrew Jones (2):
>   configure: Allow earlycon for all architectures
>   riscv: Introduce MACHINE_OVERRIDE
> 
>  configure | 88 +++++++++++++++++++++++++++----------------------------
>  riscv/run |  6 ++--
>  2 files changed, 47 insertions(+), 47 deletions(-)
> 
> -- 
> 2.48.1

Merged.

Thanks,
drew


From andrew.jones at linux.dev  Tue Mar  4 01:32:21 2025
From: andrew.jones at linux.dev (Andrew Jones)
Date: Tue, 4 Mar 2025 10:32:21 +0100
Subject: [kvm-unit-tests PATCH v2 0/3] riscv: sbi: Provide
 sbiret_report/check
In-Reply-To: <20250218185401.41250-5-andrew.jones@linux.dev>
References: <20250218185401.41250-5-andrew.jones@linux.dev>
Message-ID: <20250304-02695193b45ff3d30c19b561@orel>

On Tue, Feb 18, 2025 at 07:54:01PM +0100, Andrew Jones wrote:
> It's commom for SBI tests to expect a particular error return (or no
> error, which case it expects the returned error to be SBI_SUCCESS).
> When we don't get the expected error it'd be nice to output what we
> did get. gen_report() in the SBI tests were doing that for the BASE
> tests, improve it and export it to be used by all SBI tests.
> 
> v2:
>  - Output expected error string with sbiret_report_error() [Cl?ment]
>  - Picked up Cl?ment's tags except for patch3 since it changed a
>    decent amount.
> 
> Andrew Jones (3):
>   riscv: sbi: Improve gen_report
>   riscv: sbi: Export sbiret_report/check
>   riscv: sbi: Add sbiret_report_error
> 
>  riscv/sbi-tests.h | 36 ++++++++++++++++++++++++++++++++++++
>  riscv/sbi.c       | 30 ++++++++----------------------
>  2 files changed, 44 insertions(+), 22 deletions(-)
> 
> -- 
> 2.48.1
>

Merged.

Thanks,
drew


From andrew.jones at linux.dev  Tue Mar  4 01:34:18 2025
From: andrew.jones at linux.dev (Andrew Jones)
Date: Tue, 4 Mar 2025 10:34:18 +0100
Subject: [kvm-unit-tests PATCH v3 0/2] Add support for SBI FWFT extension
 testing
In-Reply-To: <20250129-4e54cccfa2abab6dba9a608b@orel>
References: <20250128141543.1338677-1-cleger@rivosinc.com>
 <20250129-4e54cccfa2abab6dba9a608b@orel>
Message-ID: <20250304-5e0b7b5bf691d3ba97621388@orel>

On Wed, Jan 29, 2025 at 03:18:24PM +0100, Andrew Jones wrote:
> On Tue, Jan 28, 2025 at 03:15:40PM +0100, Cl?ment L?ger wrote:
> > This series adds a minimal set of tests for the FWFT extension. Reserved
> > range as well as misaligned exception delegation. A commit coming from
> > the SSE tests series is also included in this series to add -deps
> > makefile notation.
> > 
> > ---
> > 
> > V3:
> >  - Rebase on top of andrew/riscv/sbi
> >  - Use sbiret_report_error()
> >  - Add helpers for MISALIGNED_EXC_DELEG fwft set/get
> >  - Add a comment on misaligned trap handling
> > 
> > V2:
> >  - Added fwft_{get/set}_raw() to test invalid > 32 bits ids
> >  - Added test for invalid flags/value > 32 bits
> >  - Added test for lock feature
> >  - Use and enum for FWFT functions
> >  - Replace hardcoded 1 << with BIT()
> >  - Fix fwft_get/set return value
> >  - Split set/get tests for reserved ranges
> >  - Added push/pop to arch -c option
> >  - Remove leftover of manual probing code
> > 
> > Cl?ment L?ger (2):
> >   riscv: Add "-deps" handling for tests
> >   riscv: Add tests for SBI FWFT extension
> > 
> >  riscv/Makefile      |   8 +-
> >  lib/riscv/asm/sbi.h |  34 ++++++++
> >  riscv/sbi-fwft.c    | 190 ++++++++++++++++++++++++++++++++++++++++++++
> >  riscv/sbi.c         |   3 +
> >  4 files changed, 232 insertions(+), 3 deletions(-)
> >  create mode 100644 riscv/sbi-fwft.c
> > 
> > -- 
> > 2.47.1
> >
> 
> Applied to riscv/sbi
> 
> https://gitlab.com/jones-drew/kvm-unit-tests/-/commits/riscv/sbi
>

Merged.

Thanks,
drew