[kvm-unit-tests PATCH 03/16] x86: Add X86_PROPERTY_* framework to retrieve CPUID values

[Mi, Dapeng]

On 5/30/2025 6:19 AM, Sean Christopherson wrote:
> Introduce X86_PROPERTY_* to allow retrieving values/properties from CPUID
> leafs, e.g. MAXPHYADDR from CPUID.0x80000008.  Use the same core code as
> X86_FEATURE_*, the primary difference is that properties are multi-bit
> values, whereas features enumerate a single bit.
>
> Add this_cpu_has_p() to allow querying whether or not a property exists
> based on the maximum leaf associated with the property, e.g. MAXPHYADDR
> doesn't exist if the max leaf for 0x8000_xxxx is less than 0x8000_0008.
>
> Use the new property infrastructure in cpuid_maxphyaddr() to prove that
> the code works as intended.  Future patches will convert additional code.
>
> Note, the code, nomenclature, changelog, etc. are all stolen from KVM
> selftests.
>
> Signed-off-by: Sean Christopherson <seanjc at google.com>
> ---
>  lib/x86/processor.h | 109 +++++++++++++++++++++++++++++++++++++++++---
>  1 file changed, 102 insertions(+), 7 deletions(-)
>
> diff --git a/lib/x86/processor.h b/lib/x86/processor.h
> index 3ac6711d..6b61a38b 100644
> --- a/lib/x86/processor.h
> +++ b/lib/x86/processor.h
> @@ -218,13 +218,6 @@ static inline struct cpuid cpuid(u32 function)
>  	return cpuid_indexed(function, 0);
>  }
>  
> -static inline u8 cpuid_maxphyaddr(void)
> -{
> -	if (raw_cpuid(0x80000000, 0).a < 0x80000008)
> -	return 36;
> -	return raw_cpuid(0x80000008, 0).a & 0xff;
> -}
> -
>  static inline bool is_intel(void)
>  {
>  	struct cpuid c = cpuid(0);
> @@ -329,6 +322,74 @@ struct x86_cpu_feature {
>  #define X86_FEATURE_VNMI		X86_CPU_FEATURE(0x8000000A, 0, EDX, 25)
>  #define	X86_FEATURE_AMD_PMU_V2		X86_CPU_FEATURE(0x80000022, 0, EAX, 0)
>  
> +/*
> + * Same idea as X86_FEATURE_XXX, but X86_PROPERTY_XXX retrieves a multi-bit
> + * value/property as opposed to a single-bit feature.  Again, pack the info
> + * into a 64-bit value to pass by value with no overhead on 64-bit builds.
> + */
> +struct x86_cpu_property {
> +	u32	function;
> +	u8	index;
> +	u8	reg;
> +	u8	lo_bit;
> +	u8	hi_bit;
> +};
> +#define	X86_CPU_PROPERTY(fn, idx, gpr, low_bit, high_bit)			\
> +({										\
> +	struct x86_cpu_property property = {					\
> +		.function = fn,							\
> +		.index = idx,							\
> +		.reg = gpr,							\
> +		.lo_bit = low_bit,						\
> +		.hi_bit = high_bit,						\
> +	};									\
> +										\
> +	static_assert(low_bit < high_bit);					\
> +	static_assert((fn & 0xc0000000) == 0 ||					\
> +		      (fn & 0xc0000000) == 0x40000000 ||			\
> +		      (fn & 0xc0000000) == 0x80000000 ||			\
> +		      (fn & 0xc0000000) == 0xc0000000);				\
> +	static_assert(idx < BIT(sizeof(property.index) * BITS_PER_BYTE));	\
> +	property;								\
> +})
> +
> +#define X86_PROPERTY_MAX_BASIC_LEAF		X86_CPU_PROPERTY(0, 0, EAX, 0, 31)
> +#define X86_PROPERTY_PMU_VERSION		X86_CPU_PROPERTY(0xa, 0, EAX, 0, 7)
> +#define X86_PROPERTY_PMU_NR_GP_COUNTERS		X86_CPU_PROPERTY(0xa, 0, EAX, 8, 15)
> +#define X86_PROPERTY_PMU_GP_COUNTERS_BIT_WIDTH	X86_CPU_PROPERTY(0xa, 0, EAX, 16, 23)
> +#define X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH	X86_CPU_PROPERTY(0xa, 0, EAX, 24, 31)
> +#define X86_PROPERTY_PMU_EVENTS_MASK		X86_CPU_PROPERTY(0xa, 0, EBX, 0, 7)
> +#define X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK	X86_CPU_PROPERTY(0xa, 0, ECX, 0, 31)
> +#define X86_PROPERTY_PMU_NR_FIXED_COUNTERS	X86_CPU_PROPERTY(0xa, 0, EDX, 0, 4)
> +#define X86_PROPERTY_PMU_FIXED_COUNTERS_BIT_WIDTH	X86_CPU_PROPERTY(0xa, 0, EDX, 5, 12)
> +
> +#define X86_PROPERTY_SUPPORTED_XCR0_LO		X86_CPU_PROPERTY(0xd,  0, EAX,  0, 31)
> +#define X86_PROPERTY_XSTATE_MAX_SIZE_XCR0	X86_CPU_PROPERTY(0xd,  0, EBX,  0, 31)
> +#define X86_PROPERTY_XSTATE_MAX_SIZE		X86_CPU_PROPERTY(0xd,  0, ECX,  0, 31)
> +#define X86_PROPERTY_SUPPORTED_XCR0_HI		X86_CPU_PROPERTY(0xd,  0, EDX,  0, 31)
> +
> +#define X86_PROPERTY_XSTATE_TILE_SIZE		X86_CPU_PROPERTY(0xd, 18, EAX,  0, 31)
> +#define X86_PROPERTY_XSTATE_TILE_OFFSET		X86_CPU_PROPERTY(0xd, 18, EBX,  0, 31)
> +#define X86_PROPERTY_AMX_MAX_PALETTE_TABLES	X86_CPU_PROPERTY(0x1d, 0, EAX,  0, 31)
> +#define X86_PROPERTY_AMX_TOTAL_TILE_BYTES	X86_CPU_PROPERTY(0x1d, 1, EAX,  0, 15)
> +#define X86_PROPERTY_AMX_BYTES_PER_TILE		X86_CPU_PROPERTY(0x1d, 1, EAX, 16, 31)
> +#define X86_PROPERTY_AMX_BYTES_PER_ROW		X86_CPU_PROPERTY(0x1d, 1, EBX, 0,  15)
> +#define X86_PROPERTY_AMX_NR_TILE_REGS		X86_CPU_PROPERTY(0x1d, 1, EBX, 16, 31)
> +#define X86_PROPERTY_AMX_MAX_ROWS		X86_CPU_PROPERTY(0x1d, 1, ECX, 0,  15)
> +
> +#define X86_PROPERTY_MAX_KVM_LEAF		X86_CPU_PROPERTY(0x40000000, 0, EAX, 0, 31)
> +
> +#define X86_PROPERTY_MAX_EXT_LEAF		X86_CPU_PROPERTY(0x80000000, 0, EAX, 0, 31)
> +#define X86_PROPERTY_MAX_PHY_ADDR		X86_CPU_PROPERTY(0x80000008, 0, EAX, 0, 7)
> +#define X86_PROPERTY_MAX_VIRT_ADDR		X86_CPU_PROPERTY(0x80000008, 0, EAX, 8, 15)
> +#define X86_PROPERTY_GUEST_MAX_PHY_ADDR		X86_CPU_PROPERTY(0x80000008, 0, EAX, 16, 23)
> +#define X86_PROPERTY_SEV_C_BIT			X86_CPU_PROPERTY(0x8000001F, 0, EBX, 0, 5)
> +#define X86_PROPERTY_PHYS_ADDR_REDUCTION	X86_CPU_PROPERTY(0x8000001F, 0, EBX, 6, 11)
> +#define X86_PROPERTY_NR_PERFCTR_CORE		X86_CPU_PROPERTY(0x80000022, 0, EBX, 0, 3)
> +#define X86_PROPERTY_NR_PERFCTR_NB		X86_CPU_PROPERTY(0x80000022, 0, EBX, 10, 15)
> +
> +#define X86_PROPERTY_MAX_CENTAUR_LEAF		X86_CPU_PROPERTY(0xC0000000, 0, EAX, 0, 31)
> +
>  static inline u32 __this_cpu_has(u32 function, u32 index, u8 reg, u8 lo, u8 hi)
>  {
>  	union {
> @@ -347,6 +408,40 @@ static inline bool this_cpu_has(struct x86_cpu_feature feature)
>  			      feature.reg, feature.bit, feature.bit);
>  }
>  
> +static inline uint32_t this_cpu_property(struct x86_cpu_property property)
> +{
> +	return __this_cpu_has(property.function, property.index,
> +			      property.reg, property.lo_bit, property.hi_bit);
> +}
> +
> +static __always_inline bool this_cpu_has_p(struct x86_cpu_property property)
> +{
> +	uint32_t max_leaf;
> +
> +	switch (property.function & 0xc0000000) {
> +	case 0:
> +		max_leaf = this_cpu_property(X86_PROPERTY_MAX_BASIC_LEAF);
> +		break;
> +	case 0x40000000:
> +		max_leaf = this_cpu_property(X86_PROPERTY_MAX_KVM_LEAF);
> +		break;
> +	case 0x80000000:
> +		max_leaf = this_cpu_property(X86_PROPERTY_MAX_EXT_LEAF);
> +		break;
> +	case 0xc0000000:
> +		max_leaf = this_cpu_property(X86_PROPERTY_MAX_CENTAUR_LEAF);
> +	}
> +	return max_leaf >= property.function;
> +}
> +
> +static inline u8 cpuid_maxphyaddr(void)
> +{
> +	if (!this_cpu_has_p(X86_PROPERTY_MAX_PHY_ADDR))
> +		return 36;
> +
> +	return this_cpu_property(X86_PROPERTY_MAX_PHY_ADDR);
> +}
> +
>  struct far_pointer32 {
>  	u32 offset;
>  	u16 selector;

LGTM.

Reviewed-by: Dapeng Mi <dapeng1.mi at linux.intel.com>