[PATCH 4/5] KVM: RISC-V: reset VCPU state when becoming runnable
Anup Patel
apatel at ventanamicro.com
Mon Apr 28 22:55:35 PDT 2025
On Mon, Apr 28, 2025 at 11:15 PM Radim Krčmář <rkrcmar at ventanamicro.com> wrote:
>
> 2025-04-28T17:52:25+05:30, Anup Patel <anup at brainfault.org>:
> > On Thu, Apr 3, 2025 at 5:02 PM Radim Krčmář <rkrcmar at ventanamicro.com> wrote:
> >> For a cleaner solution, we should add interfaces to perform the KVM-SBI
> >> reset request on userspace demand. I think it would also be much better
> >> if userspace was in control of the post-reset state.
> >
> > Apart from breaking KVM user-space, this patch is incorrect and
> > does not align with the:
> > 1) SBI spec
> > 2) OS boot protocol.
> >
> > The SBI spec only defines the entry state of certain CPU registers
> > (namely, PC, A0, and A1) when CPU enters S-mode:
> > 1) Upon SBI HSM start call from some other CPU
> > 2) Upon resuming from non-retentive SBI HSM suspend or
> > SBI system suspend
> >
> > The S-mode entry state of the boot CPU is defined by the
> > OS boot protocol and not by the SBI spec. Due to this, reason
> > KVM RISC-V expects user-space to set up the S-mode entry
> > state of the boot CPU upon system reset.
>
> We can handle the initial state consistency in other patches.
> What needs addressing is a way to trigger the KVM reset from userspace,
> even if only to clear the internal KVM state.
>
> I think mp_state is currently the best signalization that KVM should
> reset, so I added it there.
>
> What would be your preferred interface for that?
>
Instead of creating a new interface, I would prefer that VCPU
which initiates SBI System Reset should be resetted immediately
in-kernel space before forwarding the system reset request to
user space. This way we also force KVM user-space to explicitly
set the PC, A0, and A1 before running the VCPU again after
system reset.
Regards,
Anup
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