[PATCH v3 9/9] KVM: riscv: selftests: Add sstc timer test
Andrew Jones
ajones at ventanamicro.com
Thu Sep 14 03:15:50 PDT 2023
On Thu, Sep 14, 2023 at 10:52:15AM +0100, Conor Dooley wrote:
> On Thu, Sep 14, 2023 at 11:36:01AM +0200, Andrew Jones wrote:
> > > +static inline void cpu_relax(void)
> > > +{
> > > +#ifdef __riscv_zihintpause
> > > + asm volatile("pause" ::: "memory");
> > > +#else
> > > + /* Encoding of the pause instruction */
> > > + asm volatile(".4byte 0x100000F" ::: "memory");
> > > +#endif
> > > +}
> >
> > cpu_relax() should go to include/riscv/processor.h
>
> Can the one from asm/vdso/processor.h be reused, or are there special
> considerations preventing that?
We'd need to copy it into tools/arch/riscv/include/asm, but it could be
done. Hmm, now that I look at it, I see we're missing the barrier() call
in this kvm selftests version.
Thanks,
drew
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