[PATCH -next v18 07/20] riscv: Introduce riscv_v_vsize to record size of Vector context

Heiko Stübner heiko at sntech.de
Mon Apr 17 08:55:03 PDT 2023


Am Freitag, 14. April 2023, 17:58:30 CEST schrieb Andy Chiu:
> From: Greentime Hu <greentime.hu at sifive.com>
> 
> This patch is used to detect the size of CPU vector registers and use
> riscv_v_vsize to save the size of all the vector registers. It assumes all
> harts has the same capabilities in a SMP system. If a core detects VLENB
> that is different from the boot core, then it warns and turns off V
> support for user space.
> 
> Co-developed-by: Guo Ren <guoren at linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren at linux.alibaba.com>
> Co-developed-by: Vincent Chen <vincent.chen at sifive.com>
> Signed-off-by: Vincent Chen <vincent.chen at sifive.com>
> Signed-off-by: Greentime Hu <greentime.hu at sifive.com>
> Signed-off-by: Andy Chiu <andy.chiu at sifive.com>

Reviewed-by: Heiko Stuebner <heiko.stuebner at vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner at vrull.eu>





More information about the kvm-riscv mailing list