[PATCH 0/3] Unexpected guest trap handling for KVM RISC-V selftests

[Mayuresh Chitale]

On Tue, Mar 29, 2022 at 1:00 PM Anup Patel <apatel at ventanamicro.com> wrote:
>
> Getting unexpected guest traps while running KVM RISC-V selftests should
> cause the test to fail appropriately with VCPU register dump. This series
> improves handling of unexpected traps along these lines.
>
> These patches can also be found in riscv_kvm_selftests_unexp_trap_v1 branch
> at: https://github.com/avpatel/linux.git
>
> Anup Patel (3):
>   KVM: selftests: riscv: Set PTE A and D bits in VS-stage page table
>   KVM: selftests: riscv: Fix alignment of the guest_hang() function
>   KVM: selftests: riscv: Improve unexpected guest trap handling
>
>  .../selftests/kvm/include/riscv/processor.h   | 12 ++++---
>  .../selftests/kvm/lib/riscv/processor.c       |  9 +++---
>  tools/testing/selftests/kvm/lib/riscv/ucall.c | 31 +++++++++++++------
>  3 files changed, 34 insertions(+), 18 deletions(-)
>
> --
> 2.25.1
>
>
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I have tested the series on Qemu.

Tested-by: Mayuresh Chitale <mchitale at ventanamicro.com>