From 3513c089e4d281fa932d2b3245443645c1c44c53 Mon Sep 17 00:00:00 2001 From: Dave Hansen Date: Thu, 12 Dec 2024 13:35:14 -0800 Subject: [PATCH] x86/mm: Ensure Global mappings are zapped during kexec The kernel switches to a new set of page tables during kexec. The global mappings (_PAGE_GLOBAL==1) can remain in the TLB after this switch. This is generally not a problem because the new page tables use a different portion of the virtual address space than the normal kernel mappings. But there's no good reason to leave the old TLB entries around. They can cause nothing but trouble. Clear "Page Global Enable" (X86_CR4_PGE). This, along with the CR3 write ensures that there is no trace of the old page tables in the TLB, even global entries. Signed-off-by: Dave Hansen --- arch/x86/kernel/relocate_kernel_64.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S index e9e88c342f752..87fc788fa67b2 100644 --- a/arch/x86/kernel/relocate_kernel_64.S +++ b/arch/x86/kernel/relocate_kernel_64.S @@ -155,6 +155,8 @@ SYM_CODE_START_LOCAL_NOALIGN(identity_mapped) */ andl $(X86_CR4_PAE | X86_CR4_LA57), %r13d ALTERNATIVE "", __stringify(orl $X86_CR4_MCE, %r13d), X86_FEATURE_TDX_GUEST + /* Invalidate Global entries from the TLB: */ + andq $~(X86_CR4_PGE), %r13d movq %r13, %cr4 /* Flush the TLB (needed?) */ -- 2.34.1