[PATCH 3/8] add mem64_min/max control

[Eric W. Biederman]

"H. Peter Anvin" <hpa at zytor.com> writes:

> I think you just need one of the PIC models, or the medium model.

-fPIC has the unfortunate tendency to require a global offset table
 and still have relocations against .data so it is usually easier to
 avoid it.

That said it looks like what is left is to modify the .S files to
contain 64bit relocations or actuall position independent code.

Is there any easy way to write position independent 32bit code that will
load all of the registers, and jump to known address? 

This is what the code does right now.

	.code32
	/* load the data segments */
	movl	$0x18, %eax	/* data segment */
	movl	%eax, %ds
	movl	%eax, %es
	movl	%eax, %ss
	movl	%eax, %fs
	movl	%eax, %gs

	/* Load the registers */
	movl	eax, %eax
	movl	ecx, %ecx
	movl	edx, %edx
	movl	esi, %esi
	movl	edi, %edi
	movl	esp, %esp
	movl	ebp, %ebp
	movl	ebx, %ebx

	/* Jump to the loaded image */
	jmpl	*(eip)

	.section ".rodata"
	.balign 4
entry32_regs:  
eax:	.long 0x00000000
ebx:	.long 0x00000000
ecx:	.long 0x00000000
edx:	.long 0x00000000
esi:	.long 0x00000000
edi:	.long 0x00000000
esp:	.long 0x00000000
ebp:	.long 0x00000000
eip:	.long entry16
	.size entry32_regs, . - entry32_regs

Eric