Question regardin intel64 arch and page table setup

[Neil Horman]

Hey all-
	I've got a question regarding x86_64 and how linux uses the paging
hardware.  I'm tinkering with ways to get kexec to boot a new kernel on panic
without leaving long mode.  The idea being that if we can do that, then we don't
need to store the new kdump kernel below the 4G physical limit for 32 bit
systems.  In doing this though, I figured I would have to re-initalize the page
table with an identity mapped set of page tables to cover all of ram and load
that into cr3.  My question is, is it safe to do so while paging is enabled.
The docs I've read are unclear on that and if I have to disable paging that
automatically drops me out of long mode, which is bad.  I would think its safe
to do, since I imagined we had to do on context switches in the scheduler, but
the __switch_to implementation for x86_64 sems to do nothing but update the task
register.  Intel vol 3a says we need to update cr3, but I don't see where that
happens, so I'm not sure if theres some automated bit that does a cr3 update
safely when we write tr.

	Anywho, any guidance, clarification would be appreciated.  Thanks!
Neil