Hi Sascha,<br> I'm not an expert in ARM assembly, so, if this is correct:<br> u32 r=0;<br> asm ("mrc p15, 0, %0, c12, c0, 0" : "=r" (r));<br> printf("MRC p15, 0, <Rd>, c12, c0, 0 returns 0x%08X\n", r);<br>
r=-1;<br> asm ("mrc p15, 0, %0, c12, c0, 0" : "=r" (r));<br> printf("MRC p15, 0, <Rd>, c12, c0, 0 returns 0x%08X\n", r);<br>the return value is:<br> MRC p15, 0, <Rd>, c12, c0, 0 returns 0x00030000<br>
MRC p15, 0, <Rd>, c12, c0, 0 returns 0x00030000<br>Which is the base address of "ROM exception vectors" and the address of the "Reset" exception vector.<br>This is the value when omap_vector_init is disabled.<br>
<br>Hope this helps,<br> Vicente.<br><br><br><div class="gmail_quote">On Wed, Sep 26, 2012 at 9:06 AM, Sascha Hauer <span dir="ltr"><<a href="mailto:s.hauer@pengutronix.de" target="_blank">s.hauer@pengutronix.de</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="im">On Wed, Sep 26, 2012 at 12:59:47AM +0200, vj wrote:<br>
> Hello,<br>
> A this is my first contribution, so I'm basically requesting for comments.<br>
><br>
> The attached patch adds support for Archos G9 tablet wich uses an OMAP4460 cpu.<br>
<br>
</div>Nice :)<br>
I should have bought that one instead of a Acer.<br>
<div class="im"><br>
<br>
><br>
> A question I have is what does omap_vector_init do?<br>
> It breaks usb-booting.<br>
<br>
</div>I digged around a bit. The funny thing is that this was introduced with<br>
OMAP4 support and is only done on OMAP4. U-Boot instead has the following:<br>
<br>
> #if !defined(CONFIG_TEGRA2)<br>
> /*<br>
> * Setup vector:<br>
> * (OMAP4 spl TEXT_BASE is not 32 byte aligned.<br>
> * Continue to use ROM code vector only in OMAP4 spl)<br>
> */<br>
> #if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))<br>
> /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector<br>
> * */<br>
> mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register<br>
> bic r0, #CR_V @ V = 0<br>
> mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register<br>
><br>
> /* Set vector address in CP15 VBAR register */<br>
> ldr r0, =_start<br>
> mcr p15, 0, r0, c12, c0, 0 @Set VBAR<br>
> #endif<br>
> #endif /* !Tegra2 */<br>
<br>
So in U-Boot it's done for every ARMv7 *except* OMAP4 (and Tegra)<br>
<br>
ARM has this information about it:<br>
<br>
<a href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0434b/CIHHDAIH.html" target="_blank">http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0434b/CIHHDAIH.html</a><br>
<br>
> Purpose<br>
><br>
> Provides the exception base address for exceptions that are not<br>
> handled in monitor mode.<br>
><br>
> Usage constraints<br>
><br>
> The VBAR is:<br>
><br>
> * only accessible in privileged modes<br>
> * only accessible in Secure state.<br>
<br>
I think this is necessary to move the exception vector from ROM to our<br>
own code. Does it work to read the VBAR register using the following<br>
instruction:<br>
<br>
MRC p15, 0, <Rd>, c12, c0, 0 ; Read VBAR Register<br>
<span class="HOEnZb"><font color="#888888"><br>
Sascha<br>
<br>
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</font></span></blockquote></div><br>