[PATCH 0/4] arm: socfpga: iossm: cleanup and fix SDRAM setup

[Sascha Hauer]

On Thu, 03 Sep 2026 18:12:41 +0200, Michael Tretter wrote:
> barebox needs to wait for PLL lock before starting the SDRAM calibration
> in the EMIF.
> 
> A developer can configure the PLLs that are used for the EMIF at device
> configuration time. The SDM firmware writes the configured PLLs into the
> handoff data.
> 
> [...]

Applied, thanks!

[1/4] arm: socfpga: iossm: remove unused num_port
      https://git.pengutronix.de/cgit/barebox/commit/?id=2ca865edd2a1 (link may not be stable)
[2/4] arm: socfpga: iossm: fix macro
      https://git.pengutronix.de/cgit/barebox/commit/?id=566ce1d63e32 (link may not be stable)
[3/4] arm: socfpga: iossm: refactor register access
      https://git.pengutronix.de/cgit/barebox/commit/?id=a99ea763fb4d (link may not be stable)
[4/4] arm: socfpga: iossm: wait for PLL lock from handoff table
      https://git.pengutronix.de/cgit/barebox/commit/?id=cbac8f42939c (link may not be stable)

Best regards,
-- 
Sascha Hauer <s.hauer at pengutronix.de>