[PATCH 00/11] arm: socfpga: agilex5: add xload support for bl33 to FSBL

[Michael Tretter]

The image of the first stage boot loader on the Agilex 5 is limited to
approximately 256k. The SRAM is actually 512k, but there is some handoff
data at the send of the SRAM, which must not be overridden. There are
some size checks, but due to compression of the FSBL image, it's the
possible image size cannot be determined reliably.

The barebox PBL and a full featured barebox proper are easily larger
than the allowed size. Compression of the piggy data may even be counter
productive, since the entire FSBL image is compressed again when
creating the boot image.

Add support to remove the piggy data from the FSBL image, and load the
second stage (consisting of a barebox PBL and barebox proper) from flash
in the PBL.

Patches 1-4 rework the Cadence QSPI NOR flash driver to be available in
the PBL via the pbl_bio abstraction.

Patches 5-9 extend the Agilex 5 support to initialize the flash driver
in the PBL and chain load an SSBL as bl33 instead of copying the
currently running barebox. The patches also add the infrastructure to
build the PBL without piggy data and device tree.

Patches 10-11 enable the xload support in the Arrow AXE5 Eagle board.

Signed-off-by: Michael Tretter <m.tretter at pengutronix.de>
---
Michael Tretter (11):
      mtd: spi-nor: drop requirement for device field
      mtd: spi-nor: enable module in PBL
      mtd: spi-nor: cadence: extract common part for use in PBL
      mtd: spi-nor: cadence: add a PBL driver
      arm: socfpga: agilex5: add bl33 xload support
      arm: socfpga: agilex5: separate load and start of bl33
      arm: socfpga: agilex5: enable xload for bl33
      arm: socfpga: agilex5: initialize QSPI flash in PBL
      arm: socfpga: agilex5: add agilex5_barebox_entry_xload
      arm: socfpga: axe5-eagle: move lowlevel init to separate function
      arm: socfpga: axe5-eagle: build FSBL without piggy data

 arch/arm/boards/arrow-axe5-eagle/lowlevel.c  |  31 +-
 arch/arm/mach-socfpga/Kconfig                |  43 +-
 arch/arm/mach-socfpga/Makefile               |   3 +
 arch/arm/mach-socfpga/agilex5-xload.c        |  74 +++
 arch/arm/mach-socfpga/atf.c                  |  83 ++-
 drivers/mtd/spi-nor/Kconfig                  |   3 +
 drivers/mtd/spi-nor/Makefile                 |   5 +-
 drivers/mtd/spi-nor/cadence-quadspi-common.c | 615 +++++++++++++++++++++
 drivers/mtd/spi-nor/cadence-quadspi-pbl.c    | 104 ++++
 drivers/mtd/spi-nor/cadence-quadspi.c        | 794 +--------------------------
 drivers/mtd/spi-nor/cadence-quadspi.h        | 216 ++++++++
 drivers/mtd/spi-nor/spi-nor.c                |   3 +-
 images/Makefile.socfpga                      |   5 +
 include/mach/socfpga/generic.h               |  16 +
 include/pbl/mtd.h                            |  26 +
 15 files changed, 1210 insertions(+), 811 deletions(-)
---
base-commit: 70421fc4591e6b4b9c7172ca72b60ef1868ecc5c
change-id: 20261007-socfpga-agilex5-xload-f3f89721453b

Best regards,
-- 
Michael Tretter <m.tretter at pengutronix.de>