[PATCH v2025.09.y 09/58] ARM: socfpga: arria10-reset-manager: release UART0

[Ahmad Fatoum]

From: Bruno Knittel <bruno.knittel at bruker.com>

UART0 is also a dedictated peripheral. Release from reset to have
earlier serial for debugging.

(cherry picked from commit 0ecec7397757dc5cfc3338c2c7f0af13b19907bd)

Signed-off-by: Bruno Knittel <bruno.knittel at bruker.com>
Signed-off-by: Steffen Trumtrar <s.trumtrar at pengutronix.de>
Link: https://lore.barebox.org/20251114-v2025-11-0-topic-socfpga-arria10-v1-1-e091cddacea5@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 arch/arm/mach-socfpga/arria10-reset-manager.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-socfpga/arria10-reset-manager.c b/arch/arm/mach-socfpga/arria10-reset-manager.c
index 6f209e704520..01534cd74b87 100644
--- a/arch/arm/mach-socfpga/arria10-reset-manager.c
+++ b/arch/arm/mach-socfpga/arria10-reset-manager.c
@@ -86,6 +86,7 @@ void arria10_reset_deassert_dedicated_peripherals(void)
 	mask = ARRIA10_RSTMGR_PER1MODRST_I2C3 |
 	       ARRIA10_RSTMGR_PER1MODRST_I2C4 |
 	       ARRIA10_RSTMGR_PER1MODRST_I2C2 |
+	       ARRIA10_RSTMGR_PER1MODRST_UART0 |
 	       ARRIA10_RSTMGR_PER1MODRST_UART1 |
 	       ARRIA10_RSTMGR_PER1MODRST_GPIO2;
 	clrbits_le32(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER1MODRST, mask);
-- 
2.47.3