[PATCH v2] ARM: mmu: skip cacheable page flushes for empty ranges

[Ahmad Fatoum]

If we end here with a size of zero, region_end will become -1 and
is a sure way to lead into confusing issues.

__arch_remap_range() skips 0-sized regions, so do likewise here, so
all of arch_remap_range() is 0-size-region safe.

Reported-by: Ben Pye # Matrix
Fixes: b71103970c9b ("ARM: mmu: skip TLB invalidation if remapping zero bytes")
Signed-off-by: Ahmad Fatoum <a.fatoum at barebox.org>
---
v1 -> v2:
  - early exit instead of panic
  - Add Fixes: tag
---
 arch/arm/cpu/flush_cacheable_pages.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/cpu/flush_cacheable_pages.h b/arch/arm/cpu/flush_cacheable_pages.h
index a03e10810dc7..a5c54864d446 100644
--- a/arch/arm/cpu/flush_cacheable_pages.h
+++ b/arch/arm/cpu/flush_cacheable_pages.h
@@ -28,6 +28,9 @@ static void flush_cacheable_pages(void *start, size_t size)
 	size_t block_size;
 	mmu_addr_t *ttb;
 
+	if (!size)
+		return;
+
 	region_start = PAGE_ALIGN_DOWN((ulong)start);
 	region_end = PAGE_ALIGN(region_start + size) - 1;
 
-- 
2.47.3