[PATCH v1 06/10] mci: atmel-sdhci: add Microchip LAN9691 / LAN969X SDHCI support

Sascha Hauer s.hauer at pengutronix.de
Mon Jun 15 00:25:51 PDT 2026


On 2026-06-12 07:59, Oleksij Rempel wrote:
> Match the "microchip,lan9691-sdhci" compatible and allow building on
> ARCH_MICROCHIP (and COMPILE_TEST). LAN969X uses a different GCK rate
> (100 MHz) than the AT91 SAMA5D2 (240 MHz), so plumb the per-compatible
> rate through device_get_match_data() and fall back to the SAMA5D2 rate
> when no match data is supplied.
> 
> The LAN969X SDHCI binding doesn't expose the PMC base clock that
> sama5d2/sam9x60 carry as "baseclk" (the GCK driver handles the upstream
> source internally), so make that lookup optional.
> 
> Signed-off-by: Oleksij Rempel <o.rempel at pengutronix.de>
> ---
>  drivers/mci/Kconfig       |  6 +++---
>  drivers/mci/atmel-sdhci.c | 22 ++++++++++++++++++----
>  2 files changed, 21 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig
> index b38f7a3bdf8b..8108c7b14848 100644
> --- a/drivers/mci/Kconfig
> +++ b/drivers/mci/Kconfig
> @@ -197,12 +197,12 @@ config MCI_ATMEL
>  	  Atmel AT91.
>  
>  config MCI_ATMEL_SDHCI
> -	bool "ATMEL SDHCI (sama5d2)"
> +	bool "ATMEL SDHCI (sama5d2, lan9691)"
>  	select MCI_SDHCI
> -	depends on ARCH_AT91
> +	depends on ARCH_AT91 || ARCH_MICROCHIP || COMPILE_TEST
>  	help
>  	  Enable this entry to add support to read and write SD cards on an
> -	  Atmel sama5d2
> +	  Atmel sama5d2 or Microchip LAN969X.
>  
>  config MCI_MMCI
>  	bool "ARM PL180 MMCI"
> diff --git a/drivers/mci/atmel-sdhci.c b/drivers/mci/atmel-sdhci.c
> index 462cf21bc25f..458d022fa3fa 100644
> --- a/drivers/mci/atmel-sdhci.c
> +++ b/drivers/mci/atmel-sdhci.c
> @@ -18,6 +18,7 @@
>  
>  #define ATMEL_SDHC_MIN_FREQ	400000
>  #define ATMEL_SDHC_GCK_RATE	240000000
> +#define LAN969X_GCK_RATE	100000000
>  
>  struct at91_sdhci_priv {
>  	struct at91_sdhci host;
> @@ -55,7 +56,8 @@ static int at91_sdhci_mci_init(struct mci_host *mci, struct device *dev)
>  			       priv->mci.non_removable, priv->cal_always_on);
>  }
>  
> -static int at91_sdhci_conf_clks(struct at91_sdhci_priv *priv)
> +static int at91_sdhci_conf_clks(struct at91_sdhci_priv *priv,
> +				unsigned long gck_rate)
>  {
>  	unsigned long real_gck_rate;
>  	int ret;
> @@ -66,7 +68,7 @@ static int at91_sdhci_conf_clks(struct at91_sdhci_priv *priv)
>  	 * base clock rate and the clock mult from capabilities.
>  	 */
>  	clk_enable(priv->hclock);
> -	ret = clk_set_rate(priv->gck, ATMEL_SDHC_GCK_RATE);
> +	ret = clk_set_rate(priv->gck, gck_rate);

Do we need this clk_set_rate() call at all?
dts/src/arm/microchip/sama5d2.dtsi sets this clock via
assigned-clock-rates, so we shouldn't have to repeat that here. Only
thing is that it's set to 480MHz in the dtsi and 240MHz in the driver.

Sascha

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