[PATCH 3/5] arm: socfpga: iossm: add delay to wait for firmware

Michael Tretter m.tretter at pengutronix.de
Thu Jun 4 04:06:56 PDT 2026


Depending on the boot time of barebox, I observed cases, where the IOSSM
version register reported mailbox version 0 even though its version 0.
If this happens, barebox uses the wrong interface to read the SDRAM
configuration, is not able to detect and configure the SDRAM, and fails
to boot.

Unfortunately, the IOSSM firmware does not provide a proper
synchronization point to detect if the firmware finished its
initialization.

Add a workaround to delay the boot until the firmware initialized the
version register or a delay for mailbox version 0.

Don't use readl_poll_timeout, because in the PBL readl_poll_timeout
polls indefinitely and the polling needs to run into the timeout in case
of mailbox version 0.

Signed-off-by: Michael Tretter <m.tretter at pengutronix.de>
---
 arch/arm/mach-socfpga/iossm_mailbox.c | 23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-socfpga/iossm_mailbox.c b/arch/arm/mach-socfpga/iossm_mailbox.c
index 168bef3faeeb..6a9a7a489b75 100644
--- a/arch/arm/mach-socfpga/iossm_mailbox.c
+++ b/arch/arm/mach-socfpga/iossm_mailbox.c
@@ -158,10 +158,27 @@ static int io96b_mb_version(struct io96b_info *io96b_ctrl)
 {
 	void __iomem *io96b_csr_addr = io96b_ctrl->io96b[0].io96b_csr_addr;
 	u32 mailbox_header;
-	int version;
+	int version = 0;
+	int retry;
 
-	mailbox_header = readl(io96b_csr_addr + IOSSM_MAILBOX_HEADER_OFFSET);
-	version = FIELD_GET(IOSSM_MAILBOX_SPEC_VERSION_MASK, mailbox_header);
+	/*
+	 * There is a race between barebox on the HPS and the IOSSM firmware
+	 * initialization, which may cause barebox to read a mailbox version 0
+	 * from the IOSSM even though it's actually mailbox version 1, but the
+	 * register has not been updated, yet. Unfortunately, there is no
+	 * reliable synchronization point.
+	 *
+	 * Workaround this issue by reading the mailbox version more often. On
+	 * mailbox version 1, barebox waits until the firmware wrote the
+	 * version register. On mailbox version 0, barebox runs into the
+	 * timeout caused by the number of retries.
+	 *
+	 * The number of retries has been experimentally determined.
+	 */
+	for (retry = 100; version == 0 && retry > 0; retry--) {
+		mailbox_header = readl(io96b_csr_addr + IOSSM_MAILBOX_HEADER_OFFSET);
+		version = FIELD_GET(IOSSM_MAILBOX_SPEC_VERSION_MASK, mailbox_header);
+	}
 
 	return version;
 }

-- 
2.47.3




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