[PATCH 13/23] ARM: i.MX8M: add support to pass BL3x bl_params

[Marco Felsch]

Add support to handover the BL32 and BL33 entrypoints via the TF-A
struct::bl_params in arg0. This eliminates the requirement to share the
different load addresses between multiple binaries to lower the BSP
integration effort.

In addition to the entriespoints, this commit also adds the support to
pass the builtin barebox DTB to OP-TEE if enabled.

Signed-off-by: Marco Felsch <m.felsch at pengutronix.de>
---
 arch/arm/mach-imx/Kconfig | 13 +++++++++++
 arch/arm/mach-imx/atf.c   | 56 ++++++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 68 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0d745ce2315834ec5d0c366d227b40f2adff5e83..4e2c82c4bdda712931371a7cb122470fe3441650 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -38,6 +38,19 @@ config ARCH_IMX_ATF
 	def_bool y
 	depends on ARCH_IMX8M || ARCH_IMX9
 
+config ARCH_IMX_ATF_PASS_BL_PARAMS
+	bool "Pass BL3x bl_params as arg0 to TF-A"
+	depends on ARCH_IMX_ATF
+	select ARM_ATF
+	select ARCH_HAS_EARLY_FDT_SUPPORT
+	help
+	  Enable this option if you are using an upstream TF-A that uses
+	  the struct::bl_params to handover all required BL32 and BL33
+	  information required to start the BL32 and BL33 image.
+
+	  Since upstream TF-A v2.12 all i.MX8M support this feature except for
+	  the i.MX8MQ.
+
 config ARCH_IMX_ROMAPI
 	def_bool y
 	depends on ARCH_IMX8M || ARCH_IMX9
diff --git a/arch/arm/mach-imx/atf.c b/arch/arm/mach-imx/atf.c
index f4d4774b9eec798dd69042560d83f7313c0cb74f..baaf0bcc843a72021f97591348e9d165a34d0640 100644
--- a/arch/arm/mach-imx/atf.c
+++ b/arch/arm/mach-imx/atf.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 
+#include <asm/atf_common.h>
 #include <asm/sections.h>
 #include <common.h>
 #include <firmware.h>
@@ -108,7 +109,60 @@ imx8m_tfa_start_bl31(const void *tfa_bin, size_t tfa_size, void *tfa_dest,
 	asm volatile("msr sp_el2, %0" : :
 		     "r" (tfa_dest - 16) :
 		     "cc");
-	bl31();
+
+	/*
+	 * All upstream TF-A versions should be able to handle params passed via
+	 * x0-x3. However, if not explicit enabled don't pass any params to the
+	 * TF-A since downstream TF-A versions may have problems. Also don't
+	 * pass params for i.MX8MQ SoCs since this platform has no upstream
+	 * support yet.
+	 */
+	if (!IS_ENABLED(CONFIG_ARCH_IMX_ATF_PASS_BL_PARAMS) || cpu_is_mx8mq()) {
+		pr_debug("Jump to BL31 without bl-params\n");
+		bl31();
+	} else {
+		struct bl2_to_bl31_params_mem_v2 *params;
+		unsigned int bufsz = 0;
+		void *buf;
+
+		imx_scratch_get_fdt(&buf, &bufsz);
+		ret = pbl_load_fdt(fdt, buf, bufsz);
+		if (!ret) {
+			unsigned long mem_base = MX8M_DDR_CSD1_BASE_ADDR;
+			unsigned long mem_sz;
+
+			if (cpu_is_mx8mn())
+				mem_sz = imx8m_ddrc_sdram_size(16);
+			else
+				mem_sz = imx8m_ddrc_sdram_size(32);
+
+			fdt = buf;
+			ret = fdt_fixup_mem(fdt, &mem_base, &mem_sz, 1);
+			if (ret) {
+				pr_warn("Failed to fixup FDT memory node, continue without\n");
+				fdt = NULL;
+			}
+		} else {
+			if (ret == -ENOTSUPP)
+				pr_debug("PBL_EARLY_FDT_LOAD disabled, continue without\n");
+			else
+				pr_warn("Failed to load FDT, continue without\n");
+			fdt = NULL;
+		}
+
+		/* Prepare bl_params for BL32 */
+		params = bl2_plat_get_bl31_params_v2((uintptr_t)bl32,
+					       (uintptr_t)bl33, (uintptr_t)fdt);
+
+		/*
+		 * Start BL31 without passing the FDT via x1 since the mainline
+		 * TF-A doesn't support it yet.
+		 */
+		pr_debug("Jump to BL31 with bl-params (%s BL32-FDT)\n",
+			 fdt ? "including" : "excluding");
+		bl31_entry_v2((uintptr_t)bl31, &params->bl_params, NULL);
+	}
+
 	__builtin_unreachable();
 }
 

-- 
2.47.3