Barebox for Zedboard
Ahmad Fatoum
a.fatoum at barebox.org
Mon May 19 12:56:22 PDT 2025
Hi,
On 19.05.25 20:41, Johannes Roith wrote:
> Am Mon, May 19, 2025 at 06:50:23AM +0000 schrieb Michael Graichen:
>>
>> Dear Johannes et al.
>>
>> i'am using
>>
>>
>> for an PS<->PL FIFO.
>> But this is not used within barebox in my case. It's only there because barebox passes it's devicetree to the Linux Kernel. I only do the programming of the FPGA in barebox within my init script by
>>
>> firmwareload -t zynq-fpga-manager /mnt/boot/design_1_wrapper.bit
>>
>> I will send the latest version of my zynq-fpga-manager to the mailing list soon.
>> Please feel free to pick it up and finish my work since i did not do it since 2020.
Thanks for sharing, Michael!
Cheers,
Ahmad
>>
>> Best Regards,
>> Michael
>>
>>
> Dear Michael,
>
> thanks for sharing. The patch worked on my board just fine after
> increasing the timeouts a little bit :)
>
> If you don't mind I can take care of the patches and incoperate the
> feedback from the barebox maintainer and try to bring them upstream.
>
> Best regards,
> Johannes
>
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