[PATCH] fixup! video: Rockchip: fix zero division in rk3588_calc_cru_cfg

[Ahmad Fatoum]

GCC in CI detects that a number of arguments to rk3588_calc_cru_cfg()
may be passed to ilog2() uninitialized. This issue also exists in the
kernel:

 - if_pixclk_div, if_dclk_div are seemingly unused by rk3588_set_intf_mux
   in cases where an uninitialized value is passed to ilog2

 - dclk_out_div is used unconditionally, but is uninitialized in the
   case of eDP and HDMI.

This will be reported upstream, but until it's resolved, initialize the
values to zero (ilog2(0) == 0 in Linux/barebox).

Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 drivers/video/rockchip/rockchip_drm_vop2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/rockchip/rockchip_drm_vop2.c b/drivers/video/rockchip/rockchip_drm_vop2.c
index f15ef1b57bf5..e45492360d6f 100644
--- a/drivers/video/rockchip/rockchip_drm_vop2.c
+++ b/drivers/video/rockchip/rockchip_drm_vop2.c
@@ -852,7 +852,7 @@ static unsigned long rk3588_set_intf_mux(struct vop2_video_port *vp, int id, u32
 					 unsigned int clock)
 {
 	struct vop2 *vop2 = vp->vop2;
-	int dclk_core_div, dclk_out_div, if_pixclk_div, if_dclk_div;
+	int dclk_core_div, dclk_out_div = 0, if_pixclk_div = 0, if_dclk_div = 0;
 	u32 die, dip, div, vp_clk_div, val;
 
 	clock = rk3588_calc_cru_cfg(vp, id, &dclk_core_div, &dclk_out_div,
-- 
2.39.5