[PATCH v2 5/6] ARM: mach-imx: tzasc: add imx6q_tzc380_is_enabled
Marco Felsch
m.felsch at pengutronix.de
Thu Jun 26 07:45:26 PDT 2025
In preparation of adding an i.MX6QD optee-early helper add a helper to
check if the early code e.g. PBL/BootROM enabled the TZC380 controllers
on the i.MX6QDL.
Reviewed-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
Signed-off-by: Marco Felsch <m.felsch at pengutronix.de>
---
Changelog:
v2:
- Add Ahmad r-b
arch/arm/mach-imx/tzasc.c | 15 +++++++++++++++
include/mach/imx/tzasc.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/arch/arm/mach-imx/tzasc.c b/arch/arm/mach-imx/tzasc.c
index 54f7d1d49715..b8270a4afdc8 100644
--- a/arch/arm/mach-imx/tzasc.c
+++ b/arch/arm/mach-imx/tzasc.c
@@ -76,6 +76,9 @@
#define MX6_TZASC1_BASE 0x21d0000
#define MX6_TZASC2_BASE 0x21d4000
+#define MX6_GPR_TZASC1_EN BIT(0)
+#define MX6_GPR_TZASC2_EN BIT(1)
+
#define GPR_TZASC_EN BIT(0)
#define GPR_TZASC_ID_SWAP_BYPASS BIT(1)
#define GPR_TZASC_EN_LOCK BIT(16)
@@ -294,6 +297,18 @@ void imx6q_tzc380_early_ns_region1(void)
TZC380_REGION_SP_NS_RW);
}
+bool imx6q_tzc380_is_enabled(void)
+{
+ u32 __iomem *gpr = IOMEM(MX6_IOMUXC_BASE_ADDR);
+
+ /*
+ * MX6_GPR_TZASC1_EN and MX6_GPR_TZASC2_EN are sticky bits which
+ * preserve their values once set until the next power-up cycle.
+ */
+ return (readl(&gpr[9]) & (MX6_GPR_TZASC1_EN | MX6_GPR_TZASC2_EN)) ==
+ (MX6_GPR_TZASC1_EN | MX6_GPR_TZASC2_EN);
+}
+
void imx8m_tzc380_init(void)
{
u32 __iomem *gpr = IOMEM(MX8M_IOMUXC_GPR_BASE_ADDR);
diff --git a/include/mach/imx/tzasc.h b/include/mach/imx/tzasc.h
index 4d3f26fc82f1..59ec56a5ec60 100644
--- a/include/mach/imx/tzasc.h
+++ b/include/mach/imx/tzasc.h
@@ -7,6 +7,7 @@
#include <asm/system.h>
void imx6q_tzc380_early_ns_region1(void);
+bool imx6q_tzc380_is_enabled(void);
void imx8m_tzc380_init(void);
bool imx8m_tzc380_is_enabled(void);
--
2.39.5
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