[PATCH v2] arch: arm: imx: esdctl: limit ram to 1GB on imx93 in case OPTEE is enabled
Sascha Hauer
s.hauer at pengutronix.de
Tue Jun 24 03:26:18 PDT 2025
On Tue, Jun 24, 2025 at 12:00:09AM +0200, Michael Grzeschik wrote:
> In MX93 the ELE (Edge Lock Enclave) is limited to communicate with
> messages addressed under 1.5GB. The ELE can not reach the memory between
> (0xE0000000-0xFFFFFFFF).
1.5GB would be 0xc0000000 which you also use in the patch, but in the
commit message you say 0xe0000000. Which one is it?
I really don't like this patch and that's why I hesitated to apply it
when you first sent it. I hoped I would get a better idea how we can
allocate memory in the usable range, but I still don't have an idea, so
I'll apply it this time. Does anyone have a better idea? Adding a
reserved_mem node to the device tree might be an option, but still not
very convincing.
Sascha
>
> So we limit the usable memory in case OPTEE is used.
>
> Signed-off-by: Michael Grzeschik <m.grzeschik at pengutronix.de>
>
> ---
> v1 -> v2: moved the limitation to be active in imx93_barebox_entry only
> ---
> arch/arm/mach-imx/esdctl.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
> index 4b67b52ca45..c79d7c29245 100644
> --- a/arch/arm/mach-imx/esdctl.c
> +++ b/arch/arm/mach-imx/esdctl.c
> @@ -1046,9 +1046,20 @@ void __noreturn imx7d_barebox_entry(void *boarddata)
>
> void __noreturn imx93_barebox_entry(void *boarddata)
> {
> + resource_size_t mem = 0;
> +
> imx93_init_scratch_space(false);
> optee_set_membase(imx_scratch_get_optee_hdr());
>
> - barebox_arm_entry(MX9_DDR_CSD1_BASE_ADDR,
> - imx9_ddrc_sdram_size(), boarddata);
> + mem = imx9_ddrc_sdram_size();
> + /* In MX93 the ELE is limited to comunicate with messages
> + * under 1.5GB address space. This limits the overal memory
> + * to be 1GB in case OPTEE is used.
> + */
> + if (IS_ENABLED(CONFIG_PBL_OPTEE)) {
> + if (mem > 0x40000000)
> + mem = 0x40000000;
> + }
> +
> + barebox_arm_entry(MX9_DDR_CSD1_BASE_ADDR, mem, boarddata);
> }
> --
> 2.39.5
>
>
>
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