[PATCH] ARM: at91: clock: remove unused SAMA5D2/SAMA5D3 support from legacy clock driver

[Alexander Shiyan]

This driver is not used for DT-based boards and only affects legacy non-DT
platforms. Remove support for SAMA5D2/SAMA5D3 SoCs as they are exclusively
supported through DT-based boot in current configurations.

Signed-off-by: Alexander Shiyan <eagle.alexander923 at gmail.com>
---
 arch/arm/mach-at91/clock.c | 32 ++++----------------------------
 1 file changed, 4 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 6482aa93c0..7ffd549dc4 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -40,14 +40,10 @@
 #define cpu_has_utmi()		(  cpu_is_at91sam9rl() \
 				|| cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
-				|| cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
 				|| cpu_is_sama5d4())
 
 #define cpu_has_1200M_plla()	(cpu_is_sama5d4())
 
-#define cpu_has_1056M_plla()	(cpu_is_sama5d3())
-
 #define cpu_has_800M_plla()	(  cpu_is_at91sam9g20() \
 				|| cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
@@ -64,14 +60,10 @@
 #define cpu_has_pllb()		(!(cpu_is_at91sam9rl() \
 				|| cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
-				|| cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
 				|| cpu_is_sama5d4()))
 
 #define cpu_has_upll()		(cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
-				|| cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
 				|| cpu_is_sama5d4())
 
 /* USB host HS & FS */
@@ -81,36 +73,25 @@
 #define cpu_has_udpfs()		(!(cpu_is_at91sam9rl() \
 				|| cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
-				|| cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
 				|| cpu_is_sama5d4()))
 
 #define cpu_has_plladiv2()	(cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
 				|| cpu_is_at91sam9n12() \
-				|| cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
 				|| cpu_is_sama5d4())
 
 #define cpu_has_mdiv3()		(cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
 				|| cpu_is_at91sam9n12() \
-				|| cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
 				|| cpu_is_sama5d4())
 
 #define cpu_has_alt_prescaler()	(cpu_is_at91sam9x5() \
 				|| cpu_is_at91sam9n12() \
-				|| cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
 				|| cpu_is_sama5d4())
 
-#define cpu_has_pcr()		(cpu_is_sama5d2() \
-				|| cpu_is_sama5d3() \
-				|| cpu_is_sama5d4())
+#define cpu_has_pcr()		(cpu_is_sama5d4())
 
-#define cpu_has_dual_matrix()	(cpu_is_sama5d2() \
-				|| cpu_is_sama5d4())
+#define cpu_has_dual_matrix()	(cpu_is_sama5d4())
 
 static void *pmc;
 
@@ -253,7 +234,7 @@ static void pmc_periph_mode(struct clk *clk, int is_on)
 	u32 regval = 0;
 
 	/*
-	 * With sama5d3 chips, you have more than 32 peripherals so only one
+	 * With sama5d4 chips, you have more than 32 peripherals so only one
 	 * register is not enough to manage their clocks. A peripheral
 	 * control register has been introduced to solve this issue.
 	 */
@@ -517,7 +498,7 @@ static u32 at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
 	unsigned mul, div;
 
 	div = reg & 0xff;
-	if (cpu_is_sama5d3() || cpu_is_sama5d4())
+	if (cpu_is_sama5d4())
 		mul = (reg >> 18) & 0x7ff;
 	else
 		mul = (reg >> 16) & 0x7ff;
@@ -666,8 +647,6 @@ int at91_clock_init(void)
 
 	if (cpu_is_sama5d4())
 		pmc = IOMEM(0xf0018000);
-	else if (cpu_is_sama5d2())
-		pmc = IOMEM(0xf0014000);
 	else
 		pmc = IOMEM(0xfffffc00); /*
 					  * All other supported SoCs use this
@@ -696,9 +675,6 @@ int at91_clock_init(void)
 	if (cpu_has_1200M_plla()) {
 		if (plla.rate_hz > 1200000000)
 			pll_overclock = 1;
-	} else if (cpu_has_1056M_plla()) {
-		if (plla.rate_hz > 1056000000)
-			pll_overclock = 1;
 	} else if (cpu_has_300M_plla()) {
 		if (plla.rate_hz > 300000000)
 			pll_overclock = 1;
-- 
2.39.1