[PATCH 1/2] mmu: define MAP_WRITECOMBINE for all architectures
Ahmad Fatoum
a.fatoum at pengutronix.de
Wed Jul 30 05:31:25 PDT 2025
Write Combine (WC) memory is an optimization over uncached memory,
especially suitable for framebuffers. We allocate WC memory using
dma_alloc_writecombine(), but it can be useful to remap existing memory
not allocated within barebox as WC.
To allow this, let's define MAP_WRITECOMBINE globally with a fallback to
MAP_UNCACHED if not available.
Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
arch/Kconfig | 3 +++
arch/arm/Kconfig | 1 +
arch/arm/cpu/mmu-common.h | 1 -
arch/arm/cpu/mmu_32.c | 6 +++---
arch/arm/cpu/mmu_64.c | 4 ++--
include/mmu.h | 14 ++++++++++----
6 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/arch/Kconfig b/arch/Kconfig
index 919c8cfebab5..55618bf896c2 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -59,6 +59,9 @@ config ARCH_HAS_CTRLC
config ARCH_DMA_DEFAULT_COHERENT
bool
+config ARCH_HAS_DMA_WRITE_COMBINE
+ bool
+
config ARCH_HAS_ASAN_FIBER_API
bool
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7a3952700aa8..9694cb5b7463 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -16,6 +16,7 @@ config ARM
select HAVE_ARCH_BOARD_GENERIC_DT if OFDEVICE
select HAVE_ARCH_BOOTM_OFTREE
select HW_HAS_PCI
+ select ARCH_HAS_DMA_WRITE_COMBINE
default y
config ARCH_LINUX_NAME
diff --git a/arch/arm/cpu/mmu-common.h b/arch/arm/cpu/mmu-common.h
index ac11a87be416..3bca5cc3b821 100644
--- a/arch/arm/cpu/mmu-common.h
+++ b/arch/arm/cpu/mmu-common.h
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/sizes.h>
-#define ARCH_MAP_WRITECOMBINE ((unsigned)-1)
#define ARCH_MAP_CACHED_RWX ((unsigned)-2)
#define ARCH_MAP_CACHED_RO ((unsigned)-3)
diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
index 67f1fe59886a..89a18d342b80 100644
--- a/arch/arm/cpu/mmu_32.c
+++ b/arch/arm/cpu/mmu_32.c
@@ -238,7 +238,7 @@ static uint32_t get_pte_flags(int map_type)
return PTE_FLAGS_UNCACHED_V7;
case MAP_CODE:
return PTE_FLAGS_CODE_V7;
- case ARCH_MAP_WRITECOMBINE:
+ case MAP_WRITECOMBINE:
return PTE_FLAGS_WC_V7;
case MAP_FAULT:
default:
@@ -253,7 +253,7 @@ static uint32_t get_pte_flags(int map_type)
case MAP_CACHED:
return PTE_FLAGS_CACHED_V4;
case MAP_UNCACHED:
- case ARCH_MAP_WRITECOMBINE:
+ case MAP_WRITECOMBINE:
return PTE_FLAGS_UNCACHED_V4;
case MAP_FAULT:
default:
@@ -651,7 +651,7 @@ void mmu_disable(void)
void *dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *dma_handle)
{
- return dma_alloc_map(dev, size, dma_handle, ARCH_MAP_WRITECOMBINE);
+ return dma_alloc_map(dev, size, dma_handle, MAP_WRITECOMBINE);
}
void mmu_early_enable(unsigned long membase, unsigned long memsize, unsigned long barebox_start)
diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c
index abcc970f4bff..a229e4cb5526 100644
--- a/arch/arm/cpu/mmu_64.c
+++ b/arch/arm/cpu/mmu_64.c
@@ -295,7 +295,7 @@ static unsigned long get_pte_attrs(unsigned flags)
return attrs_xn() | UNCACHED_MEM;
case MAP_FAULT:
return 0x0;
- case ARCH_MAP_WRITECOMBINE:
+ case MAP_WRITECOMBINE:
return attrs_xn() | MEM_ALLOC_WRITECOMBINE;
case MAP_CODE:
return CACHED_MEM | PTE_BLOCK_RO;
@@ -448,7 +448,7 @@ void dma_flush_range(void *ptr, size_t size)
void *dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *dma_handle)
{
- return dma_alloc_map(dev, size, dma_handle, ARCH_MAP_WRITECOMBINE);
+ return dma_alloc_map(dev, size, dma_handle, MAP_WRITECOMBINE);
}
static void init_range(size_t total_level0_tables)
diff --git a/include/mmu.h b/include/mmu.h
index 20855e89eda3..17c04d2fa05f 100644
--- a/include/mmu.h
+++ b/include/mmu.h
@@ -5,10 +5,16 @@
#include <linux/types.h>
#include <errno.h>
-#define MAP_UNCACHED 0
-#define MAP_CACHED 1
-#define MAP_FAULT 2
-#define MAP_CODE 3
+#define MAP_UNCACHED 0
+#define MAP_CACHED 1
+#define MAP_FAULT 2
+#define MAP_CODE 3
+
+#ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
+#define MAP_WRITECOMBINE 4
+#else
+#define MAP_WRITECOMBINE MAP_UNCACHED
+#endif
/*
* Depending on the architecture the default mapping can be
--
2.39.5
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