[PATCH v2025.09.y 03/49] ARM: i.MX6: configure AIPS registers only if trusted
Ahmad Fatoum
a.fatoum at pengutronix.de
Fri Dec 19 01:20:39 PST 2025
From: Philipp Zabel <p.zabel at pengutronix.de>
Bail out of AIPS configuration if OP-TEE has cleared the MTW
("master trusted for write access") bit for the ARM core master
to lock down AIPS configuration.
Signed-off-by: Philipp Zabel <p.zabel at pengutronix.de>
Link: https://lore.barebox.org/20250925122603.3345276-1-p.zabel@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
(cherry picked from commit 4fbda28fa7ec6d6cc0e480b19cc52c955b5154dd)
Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
arch/arm/mach-imx/imx6.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index ed6cde801ec7..0cf2c17d6b90 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -31,8 +31,16 @@
#define MX6_OCOTP_CFG0 0x410
#define MX6_OCOTP_CFG1 0x420
+#define BM_MPR_MPROT1_MTW (0x1 << 25)
+
static void imx6_configure_aips(void __iomem *aips)
{
+ u32 mpr = readl(aips);
+
+ /* Bail if CPU ist not trusted for write accesses. */
+ if (!(mpr & BM_MPR_MPROT1_MTW))
+ return;
+
/*
* Set all MPROTx to be non-bufferable, trusted for R/W,
* not forced to user-mode.
--
2.47.3
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