[PATCH 02/10] ARM: rename logical shift macros push pull into lspush lspull
Ahmad Fatoum
a.fatoum at pengutronix.de
Wed Sep 25 08:52:05 PDT 2024
On 25.09.24 15:55, Sascha Hauer wrote:
> Adoption of Linux commit:
>
> | commit d98b90ea22b0a28d9d787769704a9cf1ea5a513a
> | Author: Victor Kamensky <victor.kamensky at linaro.org>
> | Date: Tue Feb 25 08:41:09 2014 +0100
> |
> | ARM: 7990/1: asm: rename logical shift macros push pull into lspush lspull
> |
> | Renames logical shift macros, 'push' and 'pull', defined in
> | arch/arm/include/asm/assembler.h, into 'lspush' and 'lspull'.
> | That eliminates name conflict between 'push' logical shift macro
> | and 'push' instruction mnemonic. That allows assembler.h to be
> | included in .S files that use 'push' instruction.
> |
> | Suggested-by: Will Deacon <will.deacon at arm.com>
> | Signed-off-by: Victor Kamensky <victor.kamensky at linaro.org>
> | Acked-by: Nicolas Pitre <nico at linaro.org>
> | Signed-off-by: Russell King <rmk+kernel at arm.linux.org.uk>
>
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
> ---
> arch/arm/include/asm/assembler.h | 8 ++++----
> arch/arm/lib32/copy_template.S | 36 ++++++++++++++++++------------------
> arch/arm/lib32/io-readsl.S | 12 ++++++------
> arch/arm/lib32/io-writesl.S | 12 ++++++------
> 4 files changed, 34 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
> index 5db0f692ee..4e7ad57170 100644
> --- a/arch/arm/include/asm/assembler.h
> +++ b/arch/arm/include/asm/assembler.h
> @@ -20,8 +20,8 @@
> * Endian independent macros for shifting bytes within registers.
> */
> #ifndef __ARMEB__
> -#define pull lsr
> -#define push lsl
> +#define lspull lsr
> +#define lspush lsl
> #define get_byte_0 lsl #0
> #define get_byte_1 lsr #8
> #define get_byte_2 lsr #16
> @@ -31,8 +31,8 @@
> #define put_byte_2 lsl #16
> #define put_byte_3 lsl #24
> #else
> -#define pull lsl
> -#define push lsr
> +#define lspull lsl
> +#define lspush lsr
> #define get_byte_0 lsr #24
> #define get_byte_1 lsr #16
> #define get_byte_2 lsr #8
> diff --git a/arch/arm/lib32/copy_template.S b/arch/arm/lib32/copy_template.S
> index f66cd6e667..897e3db3ff 100644
> --- a/arch/arm/lib32/copy_template.S
> +++ b/arch/arm/lib32/copy_template.S
> @@ -192,24 +192,24 @@
>
> 12: PLD( pld [r1, #124] )
> 13: ldr4w r1, r4, r5, r6, r7, abort=19f
> - mov r3, lr, pull #\pull
> + mov r3, lr, lspull #\pull
> subs r2, r2, #32
> ldr4w r1, r8, r9, ip, lr, abort=19f
> - orr r3, r3, r4, push #\push
> - mov r4, r4, pull #\pull
> - orr r4, r4, r5, push #\push
> - mov r5, r5, pull #\pull
> - orr r5, r5, r6, push #\push
> - mov r6, r6, pull #\pull
> - orr r6, r6, r7, push #\push
> - mov r7, r7, pull #\pull
> - orr r7, r7, r8, push #\push
> - mov r8, r8, pull #\pull
> - orr r8, r8, r9, push #\push
> - mov r9, r9, pull #\pull
> - orr r9, r9, ip, push #\push
> - mov ip, ip, pull #\pull
> - orr ip, ip, lr, push #\push
> + orr r3, r3, r4, lspush #\push
> + mov r4, r4, lspull #\pull
> + orr r4, r4, r5, lspush #\push
> + mov r5, r5, lspull #\pull
> + orr r5, r5, r6, lspush #\push
> + mov r6, r6, lspull #\pull
> + orr r6, r6, r7, lspush #\push
> + mov r7, r7, lspull #\pull
> + orr r7, r7, r8, lspush #\push
> + mov r8, r8, lspull #\pull
> + orr r8, r8, r9, lspush #\push
> + mov r9, r9, lspull #\pull
> + orr r9, r9, ip, lspush #\push
> + mov ip, ip, lspull #\pull
> + orr ip, ip, lr, lspush #\push
> str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f
> bge 12b
> PLD( cmn r2, #96 )
> @@ -220,10 +220,10 @@
> 14: ands ip, r2, #28
> beq 16f
>
> -15: mov r3, lr, pull #\pull
> +15: mov r3, lr, lspull #\pull
> ldr1w r1, lr, abort=21f
> subs ip, ip, #4
> - orr r3, r3, lr, push #\push
> + orr r3, r3, lr, lspush #\push
> str1w r0, r3, abort=21f
> bgt 15b
> CALGN( cmp r2, #0 )
> diff --git a/arch/arm/lib32/io-readsl.S b/arch/arm/lib32/io-readsl.S
> index e1855fd636..7bcd0d45bc 100644
> --- a/arch/arm/lib32/io-readsl.S
> +++ b/arch/arm/lib32/io-readsl.S
> @@ -46,25 +46,25 @@ ENTRY(__raw_readsl)
> strb ip, [r1], #1
>
> 4: subs r2, r2, #1
> - mov ip, r3, pull #24
> + mov ip, r3, lspull #24
> ldrne r3, [r0]
> - orrne ip, ip, r3, push #8
> + orrne ip, ip, r3, lspush #8
> strne ip, [r1], #4
> bne 4b
> b 8f
>
> 5: subs r2, r2, #1
> - mov ip, r3, pull #16
> + mov ip, r3, lspull #16
> ldrne r3, [r0]
> - orrne ip, ip, r3, push #16
> + orrne ip, ip, r3, lspush #16
> strne ip, [r1], #4
> bne 5b
> b 7f
>
> 6: subs r2, r2, #1
> - mov ip, r3, pull #8
> + mov ip, r3, lspull #8
> ldrne r3, [r0]
> - orrne ip, ip, r3, push #24
> + orrne ip, ip, r3, lspush #24
> strne ip, [r1], #4
> bne 6b
>
> diff --git a/arch/arm/lib32/io-writesl.S b/arch/arm/lib32/io-writesl.S
> index ed91ae19b7..61164234de 100644
> --- a/arch/arm/lib32/io-writesl.S
> +++ b/arch/arm/lib32/io-writesl.S
> @@ -40,26 +40,26 @@ ENTRY(__raw_writesl)
> blt 5f
> bgt 6f
>
> -4: mov ip, r3, pull #16
> +4: mov ip, r3, lspull #16
> ldr r3, [r1], #4
> subs r2, r2, #1
> - orr ip, ip, r3, push #16
> + orr ip, ip, r3, lspush #16
> str ip, [r0]
> bne 4b
> mov pc, lr
>
> -5: mov ip, r3, pull #8
> +5: mov ip, r3, lspull #8
> ldr r3, [r1], #4
> subs r2, r2, #1
> - orr ip, ip, r3, push #24
> + orr ip, ip, r3, lspush #24
> str ip, [r0]
> bne 5b
> mov pc, lr
>
> -6: mov ip, r3, pull #24
> +6: mov ip, r3, lspull #24
> ldr r3, [r1], #4
> subs r2, r2, #1
> - orr ip, ip, r3, push #8
> + orr ip, ip, r3, lspush #8
> str ip, [r0]
> bne 6b
> mov pc, lr
>
--
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