[PATCH v2 1/2] net/phy: sync phy_interface_t types with Linux

[Ahmad Fatoum]

On 04.01.24 12:22, Sascha Hauer wrote:
> This syncs the phy interface modes with Linux as of linux-6.7-rc7.
> 
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>

Reviewed-by: Ahmad Fatoum <a.fatoum at pengutronix.de>

> ---
>  include/linux/phy.h | 55 +++++++++++++++++++++++++++++++++++++++++----
>  1 file changed, 51 insertions(+), 4 deletions(-)
> 
> diff --git a/include/linux/phy.h b/include/linux/phy.h
> index d68ee5665a..7da4f94e0e 100644
> --- a/include/linux/phy.h
> +++ b/include/linux/phy.h
> @@ -36,7 +36,46 @@
>  #define PHY_GBIT_FEATURES       (PHY_BASIC_FEATURES | \
>  				 PHY_1000BT_FEATURES)
>  
> -/* Interface Mode definitions */
> +/**
> + * enum phy_interface_t - Interface Mode definitions
> + *
> + * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
> + * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
> + * @PHY_INTERFACE_MODE_MII: Media-independent interface
> + * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
> + * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
> + * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
> + * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
> + * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
> + * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
> + * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
> + * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
> + * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
> + * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
> + * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
> + * @PHY_INTERFACE_MODE_SMII: Serial MII
> + * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
> + * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
> + * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
> + * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
> + * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
> + * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
> + * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
> + * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
> + * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
> + * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
> + * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
> + * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
> + * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
> + * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
> + * @PHY_INTERFACE_MODE_USXGMII:  Universal Serial 10GE MII
> + * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
> + * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
> + * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
> + * @PHY_INTERFACE_MODE_MAX: Book keeping
> + *
> + * Describes the interface between the MAC and PHY.
> + */
>  typedef enum {
>  	PHY_INTERFACE_MODE_NA,
>  	PHY_INTERFACE_MODE_INTERNAL,
> @@ -54,17 +93,25 @@ typedef enum {
>  	PHY_INTERFACE_MODE_RTBI,
>  	PHY_INTERFACE_MODE_SMII,
>  	PHY_INTERFACE_MODE_XGMII,
> +	PHY_INTERFACE_MODE_XLGMII,
>  	PHY_INTERFACE_MODE_MOCA,
> +	PHY_INTERFACE_MODE_PSGMII,
>  	PHY_INTERFACE_MODE_QSGMII,
>  	PHY_INTERFACE_MODE_TRGMII,
> +	PHY_INTERFACE_MODE_100BASEX,
>  	PHY_INTERFACE_MODE_1000BASEX,
>  	PHY_INTERFACE_MODE_2500BASEX,
> +	PHY_INTERFACE_MODE_5GBASER,
>  	PHY_INTERFACE_MODE_RXAUI,
>  	PHY_INTERFACE_MODE_XAUI,
> -	/* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
> +	/* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
> +	PHY_INTERFACE_MODE_10GBASER,
> +	PHY_INTERFACE_MODE_25GBASER,
> +	PHY_INTERFACE_MODE_USXGMII,
> +	/* 10GBASE-KR - with Clause 73 AN */
>  	PHY_INTERFACE_MODE_10GKR,
> -	PHY_INTERFACE_MODE_SGMII_2500,
> -	PHY_INTERFACE_MODE_NONE,
> +	PHY_INTERFACE_MODE_QUSGMII,
> +	PHY_INTERFACE_MODE_1000BASEKX,
>  	PHY_INTERFACE_MODE_MAX,
>  } phy_interface_t;
>  

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