[PATCH master 1/3] soc: sifive: l2_cache: fix 32-bit compilation

[Ahmad Fatoum]

The StarFive SoCs are 64-bit, but the L2 cache driver could be
compile-tested on 32-bit as well. Currently, this would fail, because
writeq isn't defined. Fix this by emulating it using a lo-hi write.

Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 drivers/soc/sifive/sifive_l2_cache.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c
index aab21f9f50e6..c404143974fc 100644
--- a/drivers/soc/sifive/sifive_l2_cache.c
+++ b/drivers/soc/sifive/sifive_l2_cache.c
@@ -9,6 +9,7 @@
 #define pr_fmt(fmt) "sifive-l2: " fmt
 
 #include <io.h>
+#include <io-64-nonatomic-lo-hi.h>
 #include <linux/printk.h>
 #include <stdio.h>
 #include <driver.h>
-- 
2.39.2