[PATCH 1/5] Revert "mtd: nand: drop DT support in legacy driver"

[Ahmad Fatoum]

DT support was removed with the rationale that all DT-enabled platforms
are supported by the new driver ported from Linux. The new driver
however refuses to work the AT91SAM9263. Until that's figured it,
restore DT support in the legacy driver.

This reverts commit 1fd8336bb0fe46856d2881121dd61bf560910448.

Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 drivers/mtd/nand/Kconfig        |   8 ++-
 drivers/mtd/nand/atmel/legacy.c | 104 +++++++++++++++++++++++++++++++-
 2 files changed, 109 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 87926d88d2c6..19f4322f65a1 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -114,10 +114,14 @@ config NAND_ATMEL
 	depends on ARCH_AT91 || (OFDEVICE && COMPILE_TEST)
 
 config NAND_ATMEL_LEGACY
-	def_bool !AT91_MULTI_BOARDS
+	def_bool !AT91_MULTI_BOARDS || SOC_AT91SAM9
 	depends on NAND_ATMEL
 	help
-	  Select legacy non-device tree enabled driver.
+	  Select legacy driver for non-DT-enabled platforms
+	  and for the deprecated non-EBI binding.
+
+	  The deprecated binding is currently the only one
+	  support for AT91SAM9.
 
 config NAND_ATMEL_PMECC
 	bool
diff --git a/drivers/mtd/nand/atmel/legacy.c b/drivers/mtd/nand/atmel/legacy.c
index cf402549b857..cee9e49be021 100644
--- a/drivers/mtd/nand/atmel/legacy.c
+++ b/drivers/mtd/nand/atmel/legacy.c
@@ -23,6 +23,10 @@
 #include <init.h>
 #include <gpio.h>
 
+#include <of.h>
+#include <of_gpio.h>
+#include <of_mtd.h>
+
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/mtd/nand.h>
@@ -1105,6 +1109,92 @@ static void atmel_nand_hwctl(struct nand_chip *nand_chip, int mode)
 {
 }
 
+static int atmel_nand_of_init(struct atmel_nand_host *host, struct device_node *np)
+{
+	u32 val;
+	u32 offset[2];
+	int ecc_mode;
+	struct atmel_nand_data *board = host->board;
+	enum of_gpio_flags flags = 0;
+
+	if (!IS_ENABLED(CONFIG_OFDEVICE))
+		return -ENOSYS;
+
+	if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) {
+		if (val >= 32) {
+			dev_err(host->dev, "invalid addr-offset %u\n", val);
+			return -EINVAL;
+		}
+		board->ale = val;
+	}
+
+	if (of_property_read_u32(np, "atmel,nand-cmd-offset", &val) == 0) {
+		if (val >= 32) {
+			dev_err(host->dev, "invalid cmd-offset %u\n", val);
+			return -EINVAL;
+		}
+		board->cle = val;
+	}
+
+	ecc_mode = of_get_nand_ecc_mode(np);
+
+	board->ecc_mode = ecc_mode < 0 ? NAND_ECC_SOFT : ecc_mode;
+
+	board->on_flash_bbt = of_get_nand_on_flash_bbt(np);
+
+	if (of_get_nand_bus_width(np) == 16)
+		board->bus_width_16 = 1;
+
+	board->rdy_pin = of_get_gpio_flags(np, 0, &flags);
+	board->enable_pin = of_get_gpio(np, 1);
+	board->det_pin = of_get_gpio(np, 2);
+
+	board->has_pmecc = of_property_read_bool(np, "atmel,has-pmecc");
+
+	if (!(board->ecc_mode == NAND_ECC_HW) || !board->has_pmecc)
+		return 0;	/* Not using PMECC */
+
+	/* use PMECC, get correction capability, sector size and lookup
+	* table offset.
+	* If correction bits and sector size are not specified, then
+	*   find
+	* them from NAND ONFI parameters.
+	*/
+	if (of_property_read_u32(np, "atmel,pmecc-cap", &val) == 0) {
+		if ((val != 2) && (val != 4) && (val != 8) && (val != 12) && (val != 24)) {
+			dev_err(host->dev, "Unsupported PMECC correction capability: %d"
+					" should be 2, 4, 8, 12 or 24\n", val);
+			return -EINVAL;
+		}
+
+		board->pmecc_corr_cap = (u8)val;
+	}
+
+	if (of_property_read_u32(np, "atmel,pmecc-sector-size", &val) == 0) {
+		if ((val != 512) && (val != 1024)) {
+				dev_err(host->dev, "Unsupported PMECC sector size: %d"
+					" should be 512 or 1024 bytes\n", val);
+			return -EINVAL;
+		}
+
+		board->pmecc_sector_size = (u16)val;
+	}
+
+	if (of_property_read_u32_array(np, "atmel,pmecc-lookup-table-offset", offset, 2) != 0) {
+		dev_err(host->dev, "Cannot get PMECC lookup table offset\n");
+		return -EINVAL;
+	}
+
+	if (!offset[0] && !offset[1]) {
+		dev_err(host->dev, "Invalid PMECC lookup table offset\n");
+		return -EINVAL;
+	}
+
+	board->pmecc_lookup_table_offset = (board->pmecc_sector_size == 512) ? offset[0] : offset[1];
+
+	return 0;
+}
+
 static int atmel_hw_nand_init_params(struct device *dev,
 					 struct atmel_nand_host *host)
 {
@@ -1191,7 +1281,13 @@ static int __init atmel_nand_probe(struct device *dev)
 	host->board = pdata;
 	host->dev = dev;
 
-	memcpy(host->board, dev->platform_data, sizeof(struct atmel_nand_data));
+	if (dev->of_node) {
+		res = atmel_nand_of_init(host, dev->of_node);
+		if (res)
+			goto err_no_card;
+	} else {
+		memcpy(host->board, dev->platform_data, sizeof(struct atmel_nand_data));
+	}
 
 	nand_chip->priv = host;		/* link the private data structures */
 	mtd->dev.parent = dev;
@@ -1327,9 +1423,15 @@ static int __init atmel_nand_probe(struct device *dev)
 	return res;
 }
 
+static struct of_device_id atmel_nand_dt_ids[] = {
+	{ .compatible = "atmel,at91rm9200-nand" },
+	{ /* sentinel */ }
+};
+
 static struct driver atmel_nand_driver = {
 	.name	= "atmel_nand",
 	.probe	= atmel_nand_probe,
+	.of_compatible	= DRV_OF_COMPAT(atmel_nand_dt_ids),
 };
 device_platform_driver(atmel_nand_driver);
 
-- 
2.39.2