IMX8M and Optee support

Hans Christian Lønstad hcl at
Wed Oct 18 04:29:09 PDT 2023

We have a 2GB IMX8MP system using 32MB OPTEEE_SIZE, so expect to find Optee blob at 0xBE000000.

ATF compiled with:
make PLAT=imx8mp BL32_BASE=0xBE000000 IMX_BOOT_UART_BASE=0x30890000 SPD=opteed DEBUG=1 -j

Optee compiled with:

CFG_DDR_SIZE ?= UL(0x80000000)

Barebox compiled with:

This produces the following on boot:

Uart initialized
Run level 3
Init power
Init DDR
Handover to ATF
imx8mp_load_and_start_image_via_tfa: Expect OPTEE at 0xbe000000
CH e2a7175151fe3e842116990e62c864334e1bb030ca146b749d8e6b0c02481357
IH e2a7175151fe3e842116990e62c864334e1bb030ca146b749d8e6b0c02481357
                                                                   NOTICE:  Do not release JR0 to NS as it can be used by HAB
NOTICE:  BL31: v2.8(debug):lf-6.1.36-2.1.0-0-g1a3beeab6-dirty
NOTICE:  BL31: Built : 13:14:09, Oct 18 2023
INFO:    GICv3 with legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    Maximum SPI INTID supported: 191
INFO:    BL31: Initializing runtime services
INFO:    bl31_plat_get_next_image_ep_info: want image 0
INFO:    bl31_plat_get_next_image_ep_info: bl32 PC is 0xbe000000
INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied
WARNING: BL31: cortex_a53: CPU workaround for 1530924 was missing!
INFO:    BL31: Initializing BL32
INFO:    bl31_plat_get_next_image_ep_info: want image 0
INFO:    bl31_plat_get_next_image_ep_info: bl32 PC is 0xbe000000
INFO:    opteed_init: 176 - calling <opteed_synchronous_sp_entry>
INFO:    opteed_synchronous_sp_entry: 79 - calling <opteed_enter_sp>


I´m not sure why it asks for the same image twice and if this implies anything …


> 18. okt. 2023 kl. 11:06 skrev Ahmad Fatoum <a.fatoum at>:
> Hello Hans,
> On 18.10.23 10:11, Hans Christian Lønstad wrote:
>> Just reaching out to ask whether anyone has successfully integrated Optee on the IMX8M(P) platform.
>> Our trials results in a crash when the ATF (NXP 2.8) does the handover to Optee (exit EL3).
>> In ATF it appears that BL32 is expected to load at 0x56000000 on IMX8MP while Barebox actually loads
>> The Optee bin blob just below top of memory.
>> (Patching Barebox to the expected ATF BL32_BASE does not resolve the issue)
>> Any help would be appreciated
> I am using OP-TEE in an i.MX8MN project successfully. The hardcoding of addresses
> is indeed unfortunate and it needs manual adjustment depending on the size
> of available RAM.
> The common configuration is to reserve secure memory at the end of DRAM as not
> to split the RAM in half. You should thus change the BL32 address used in TF-A
> in alignment with barebox CONFIG_OPTEE_SIZE, which is always relative to the end
> of RAM.
> Let me know how it goes.
> Cheers,
> Ahmad
>> Hans Christian Lønstad
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